Multiplication of signed-operands

Slides:



Advertisements
Similar presentations
CMPE 325 Computer Architecture II
Advertisements

Cosc 2150: Computer Organization Chapter 9, Part 2 Integer multiplication and division.
Integer division Pencil and paper binary division (dividend)(divisor) 1000.
THE ARITHMETIC-LOGIC UNIT. BINARY HALF-ADDER BINARY HALF-ADDER condt Half adder InputOutput XYSC
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3: IT Students.
Binary Addition Rules Adding Binary Numbers = = 1
CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (2)
Computer ArchitectureFall 2007 © September 5, 2007 Karem Sakallah CS 447 – Computer Architecture.
Fixed-Point Arithmetics: Part I
Chapter 6 Arithmetic. Addition Carry in Carry out
L10 – Multiplication Division 1 Comp 411 – Fall /19/2009 Binary Multipliers ×
Integer Multiplication and Division ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering.
Computer Organization Multiplication and Division Feb 2005 Reading: Portions of these slides are derived from: Textbook figures © 1998 Morgan Kaufmann.
UNIVERSITY OF MASSACHUSETTS Dept
COE 308: Computer Architecture (T041) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach,
CPSC 321 Computer Architecture ALU Design – Integer Addition, Multiplication & Division Copyright 2002 David H. Albonesi and the University of Rochester.
DIGITAL SYSTEMS TCE1111 Representation and Arithmetic Operations with Signed Numbers Week 6 and 7 (Lecture 1 of 2)
1 Lecture 4: Arithmetic for Computers (Part 4) CS 447 Jason Bakos.
Computer ArchitectureFall 2008 © August 27, CS 447 – Computer Architecture Lecture 4 Computer Arithmetic (2)
ECE 645 – Computer Arithmetic Lecture 9: Basic Dividers ECE 645—Computer Arithmetic 4/1/08.
1 Arithmetic and Logical Operations - Part II. Unsigned Numbers Addition in unsigned numbers is the same regardless of the base. Given a pair of bit sequences.
ECE 4110– Sequential Logic Design
Chapter 6-2 Multiplier Multiplier Next Lecture Divider
Copyright 1995 by Coherence LTD., all rights reserved (Revised: Oct 97 by Rafi Lohev, Oct 99 by Yair Wiseman, Sep 04 Oren Kapah) IBM י ב מ 10-1 The ALU.
Number Systems. Why binary numbers? Digital systems process information in binary form. That is using 0s and 1s (LOW and HIGH, 0v and 5v). Digital designer.
 Recall grade school trick ◦ When multiplying by 9:  Multiply by 10 (easy, just shift digits left)  Subtract once ◦ E.g.  x 9 = x (10.
King Fahd University of Petroleum and Minerals King Fahd University of Petroleum and Minerals Computer Engineering Department Computer Engineering Department.
Digital Kommunikationselektronik TNE027 Lecture 2 1 FA x n –1 c n c n1- y n1– s n1– FA x 1 c 2 y 1 s 1 c 1 x 0 y 0 s 0 c 0 MSB positionLSB position Ripple-Carry.
1 Chapter 7 Computer Arithmetic Smruti Ranjan Sarangi Computer Organisation and Architecture PowerPoint Slides PROPRIETARY MATERIAL. © 2014 The McGraw-Hill.
Lecture 6: Multiply, Shift, and Divide
Division Harder Than Multiplication Because Quotient Digit Selection/Estimation Can Have Overflow Condition – Divide by Small Number OR even Worse – Divide.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Topics covered: Arithmetic CSE243: Introduction to Computer Architecture and Hardware/Software Interface.
Partial Quotient Method In this division algorithm the children record on the right side of the problem. The first thing they do is divide. They ask themselves.
Csci 136 Computer Architecture II – Multiplication and Division
Mohamed Younis CMCS 411, Computer Architecture 1 CMSC Computer Architecture Lecture 11 Performing Division March 5,
COE 308: Computer Architecture (T032) Dr. Marwan Abu-Amara Integer & Floating-Point Arithmetic (Appendix A, Computer Architecture: A Quantitative Approach,
CDA 3101 Spring 2016 Introduction to Computer Organization
Integer Operations Computer Organization and Assembly Language: Module 5.
Ch. 4 Computer Arithmetic
Chapter 8 Computer Arithmetic. 8.1 Unsigned Notation Non-negative notation  It treats every number as either zero or a positive value  Range: 0 to 2.
1 Lecture 5Multiplication and Division ECE 0142 Computer Organization.
Arithmetic for Computers Chapter 3 1. Arithmetic for Computers  Operations on integers  Addition and subtraction  Multiplication and division  Dealing.
Chapter 9 Computer Arithmetic
William Stallings Computer Organization and Architecture 8th Edition
Arithmetic UNIT-V.
More Binary Arithmetic - Multiplication
Multiplication and Division basics
Integer Multiplication and Division
CSCI206 - Computer Organization & Programming
Morgan Kaufmann Publishers
Multiplication & Division
CDA 3101 Summer 2007 Introduction to Computer Organization
CSCE 350 Computer Architecture
CSCI206 - Computer Organization & Programming
Topic 3c Integer Multiply and Divide
Computer Organization and Design
ECEG-3202 Computer Architecture and Organization
Chapter 8 Computer Arithmetic
Booth Recoding: Advantages and Disadvantages
1 Lecture 5Multiplication and Division ECE 0142 Computer Organization.
Presentation transcript:

CSE243: Introduction to Computer Architecture and Hardware/Software Interface

Multiplication of signed-operands Recall we discussed multiplication of unsigned numbers: Combinatorial array multiplier. Sequential multiplier. Need an approach that works uniformly with unsigned and signed (positive and negative 2’s complement) n-bit operands. Booth’s algorithm treats positive and negative 2’s complement operands uniformly.

Booth’s algorithm Booth’s algorithm applies uniformly to both unsigned and 2’s complement signed integers. Basis of other fast product algorithms. Fundamental observation: Division of an integer into the sum of block-1’s integers. Suppose we have a 16-bit binary number: 0110011011110110 This number can be represented as the sum of 4 “block-1” integers: 0110000000000000 0000011000000000 0000000011110000 +0000000000000110 0110011011110110

Booth’s algorithm (contd..) Suppose Q is a block-1 integer: Q = 0000000001111000 = 120 Then: X.Q = X.120 Now: 120 = 128 - 8, so that X.Q = X.120 = X.(128-8) = X.128 - X.8 And: Q = 0000000001111000 128 = 0000000010000000 8 = 0000000000001000 If we label the LSB as 0, then the first 1 in the block of 1’s is at position 3 and the last one in the block of 1’s is at position 6. As a result: X.Q = X.120 = X.128 - X.8 = X.27 - X.23

Booth’s algorithm (contd..) Representing Block-1 integers Q is an n-bit block-1 unsigned integer: -Bit position 0 is LSB. -First 1 is in bit position j -Last 1 is in bit position k Then: Q = 2k+1 - 2j Q.X = X.(2k+1 - 2j) = X. 2k+1 - X. 2j

Booth’s algorithm (contd..) Let Q be the block-1 integer: Q = 01111111111111110 To form the product X.Q using normal multiplication would involve 14 add/shifts (one for each 1-valued bit in multiplier Q). Since: Q = 215 – 21 X.Q = X.(215 – 21) Product X.Q can be computed as follows: 1. Set the Partial Product (PP) to 0. 2. Subtract X.21 from PP. 3. Add X.215 to PP. Note that X.2j is equivalent to shifting X left j times.

Booth’s algorithm (contd..) If Q is not a block-1 integer, Q can be decomposed so that it can be represented as a sum of block-1 integers. Suppose: Q = 0110011011110110 Q can be decomposed as: 0110000000000000 = 215 -213 0000011000000000 = 211 - 29 0000000011110000 = 27 - 24 +0000000000000110 = 23 - 21 0110011011110110 Thus, Q.X = X.(215 - 213 + 211 - 29 +27 - 24 + 23 - 21 )

Booth’s algorithm (contd..) Inputs: n-bit multiplier Q n-bit multiplicand x 2n-bit current Partial Product (PP) initially set to 0. (Upper half of PP is bits n-1 through n) Q has an added ‘0’ bit attached to the LSB (Q has n+1 bits). Algorithm: For every bit in Q: 1. Examine the bit and its neighbor to the immediate right. If the bit pair is: 00 – do nothing. 01 – Add the multiplicand to the upper half of PP. 10 – Sub the multiplicand from the upper half of PP. 11 – Do nothing. 2. Shift the PP right by one bit, extending the sign bit.

Booth’s algorithm (contd..) – Example #1 01001100 Multiplicand X 01110111 Multiplier Q 00000000 00000000 Double-length PP register Step 0 bit pair 10 action: SUB 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 Shift Right 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 Step 1 bit pair 11 action: --- 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 Shift Right 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 Step 2 bit pair 11 action: --- 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 Shift Right 1 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 Step 3 bit pair 01 action: ADD 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 Shift Right 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 Step 4 bit pair 10 action: SUB 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 Shift Right 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 Step 5 bit pair 11 action: --- 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 Shift Right 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 Step 6 bit pair 11 action: --- 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 Shift Right 1 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 Step 7 bit pair 01 action: ADD 0 1 0 0 0 1 1 0 1 0 1 0 1 0 0 0 Shift Right 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 0 = Product: 9044

Booth’s algorithm (contd..) – Example #2 Multiplicand in Binary: 1 0 1 1 0 1 0 0 = -119 Multiplier in Binary: 0 1 1 1 0 1 1 1 = 76 Step 0 bit pair 10 action: SUB 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 Shift Right 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 Step 1 bit pair 11 action: --- 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 Shift Right 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 Step 2 bit pair 11 action: --- 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 Shift Right 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 Step 3 bit pair 01 action: ADD 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 0 Shift Right 1 1 0 1 1 1 1 0 1 1 0 0 0 0 0 0 Step 4 bit pair 10 action: SUB 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 0 Shift Right 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 Step 5 bit pair 11 action: --- 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 0 Shift Right 0 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 Step 6 bit pair 11 action: --- 0 0 0 0 1 0 1 0 1 0 1 1 0 0 0 0 Shift Right 0 0 0 0 0 1 0 1 0 1 0 1 1 0 0 0 Step 7 bit pair 01 action: ADD 1 0 1 1 1 0 0 1 0 1 0 1 1 0 0 0 Shift Right 1 1 0 1 1 1 0 0 1 0 1 0 1 1 0 0 = Product: -9044 Multiplier: Positive Multiplicand: 2’s comp. -ve

Booth’s algorithm (contd..) – Example #3 Multiplicand in Binary: 1 0 1 1 0 1 0 0 = -119 Multiplier in Binary: 1 0 0 0 1 0 0 1= -76 Step 0 bit pair 10 action: SUB 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 Shift Right 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 Step 1 bit pair 01 action: ADD 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 0 Shift Right 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 Step 2 bit pair 00 action: --- 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 0 Shift Right 1 1 1 1 0 1 1 0 1 0 0 0 0 0 0 0 Step 3 bit pair 10 action: SUB 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 Shift Right 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 0 Step 4 bit pair 01 action: ADD 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 0 Shift Right 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 Step 5 bit pair 00 action: --- 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 0 Shift Right 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 Step 6 bit pair 00 action: --- 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 0 Shift Right 1 1 1 1 1 0 1 0 1 0 1 0 1 0 0 0 Step 7 bit pair 10 action: SUB 0 1 0 0 0 1 1 0 1 0 1 0 1 0 0 0 Shift Right 0 0 1 0 0 0 1 1 0 1 0 1 0 1 0 0 = Product: 9044 Multiplier: 2’s comp. -ve Multiplicand:

Booth’s algorithm and signed integers Booth’s algorithm works correctly for any combination of 2’s complement numbers. If Q is a 2’s complement negative number, the Q is of the form: Q = 1 qn-2 qn-3 qn-4............ q1 q0 And: V(Q) = -2n-1 + qn-2 2n-2 + qn-3 2n-3 + ......... + q2 22 + q1 21 + q0 20 If Q has no zeros, that is: Q = 111....11 = -1 Booth technique will: - See the first pair as 10 (subtract the multiplicand) - See all other pairs as 11 (do nothing) Thus, Booth technique will compute the result as required: 0 - X = -X = -1.X

Booth’s algorithm and signed integers (contd..) Booth’s technique is correct for an arbitrary –ve 2’s complement number Q is a 2’s complement number: Q = 1 qn-2 qn-3 qn-4............ q1 q0 V(Q) = -2n-1 + qn-2 2n-2 + qn-3 2n-3 + ......... + q2 22 + q1 21 + q0 20 If we read Q from MSB (left hand side), Q will have certain number of 1s followed by a 0. If the first 0 appears in the mth bit of Q. V(Q) = -2n-1 + qn-2 2n-2 + qn-3 2n-3 + ......... + q2 22 + q1 21 + q0 20 = ( -2n-1 + 2n-2 + 2n-3 + ......... 2m+1 ) + (qm-1 2m-1 + ......... + q2 22 + q1 21 + q0 20 ) = -2m+1 + (qm-1 2m-1 + ......... + q2 22 + q1 21 + q0 20 ) Where ( -2n-1 + 2n-2 + 2n-3 + ......... 2m+1 ) = -2m+1 Bit m is 0, so m-bit number starting from 0 is a positive number. Booth’s algorithm will work correctly. Transitioning from bit m to m+1, algo sees the bit pair 10, causing it to subtract the multiplicand 2m+1 from the PP. All other transition see pairs 11 which have no effect.

Unsigned division Division is a more tedious process than multiplication. For the unsigned case, there are two standard approaches: 1.) Restoring division. 2.) Non restoring division. 1 13 14 26 21 274 1101 100010010 10101 1 1110 10000 Try dividing 13 into 2. Try dividing 13 into 26. Try dividing 1101 into 1, 10, 100, 1000 and 10001.

Restoring division How do we know when the divisor has gone into part of the dividend correctly? 1101 100010010 10101 1 1110 10000 Subtract 1101 from 1, result is negative Subtract 1101 from 10, result is negative. Subtract 1101 from 100, result is negative Subtract 1101 from 1000, result is negative. Subtract 1101 from 10001, result is positive.

Restoring division Strategy for unsigned division: Shift the dividend one bit at a time starting from MSB into a register. Subtract the divisor from this register. If the result is negative (“didn’t go”): - Add the divisor back into the register. - Record 0 into the result register. If the result is positive: - Do not restore the intermediate result. - Set a 1 into the result register.

Restoring division (contd..) Set Register A to 0. Load dividend in Q. Load divisor into M. Repeat n times: - Shift A and Q left one bit. -Subtract M from A. -Place the result in A. -If sign of A is 1, set q0 to 0 and add M back to A. Else set q0 to 1. Shift left a a a q q n n - 1 n - 1 A Dividend Q Quotient setting n + 1 -bit adder Add/Subtract Control sequencer m m End of the process: - Quotient will be in Q. - Remainder will be in A. n - 1 Divisor M Sign bit (result of sub)

Restoring division (contd..) 1 Subtract Shift Restore Initially Quotient Remainder Second cycle First cycle Third cycle Fourth cycle q Set 1

Non-restoring division Restoring division can be improved using non-restoring algorithm The effect of restoring algorithm actually is: If A is positive, we shift it left and subtract M, that is compute 2A-M If A is negative, we restore it (A+M), shift it left, and subtract M, that is, 2(A+M) – M = 2A+M. Set q0 to 1 or 0 appropriately. Non-restoring algorithm is: Set A to 0. Repeat n times: If the sign of A is positive: Shift A and Q left and subtract M. Set q0 to 1. Else if the sign of A is negative: Shift A and Q left and add M. Set q0 to 0. If the sign of A is 1, add A to M.

Non-restoring division (contd..) 1 Quotient Shift Add Subtract Initially Fourth cycle Third cycle Second cycle First cycle q Set 1 Add Remainder 1 Restore remainder