Indian Institute of Technology Bombay 1 SEQUEL: A Solver for circuit EQuations with User-defined ELements Prof. Mahesh B. Patil www.ee.ittb.ac.in/faculty/mbp/sequel1.html.

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Indian Institute of Technology Bombay 1 SEQUEL: A Solver for circuit EQuations with User-defined ELements Prof. Mahesh B. Patil

Indian Institute of Technology Bombay 2 Allows user-defined elements Based on the Sparse Tableau Approach: no need for “through” and “across” variables DC, transient, small-signal, noise Mixed-signal simulation Electrothermal simulation Sensitivity analysis (exact) Features Continued Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 3 Switched capacitor circuits Efficient “steady-state waveform” computation Perfectly “general” elements are possible (mechanical, thermal etc) Runs on GNU/Linux and Solaris Free!! Features Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 4 Block Diagram of SEQUEL Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 5 All elements are divided into (a) purely electrical, (b) pure digital, (c) DAC type, (d) ADC type. After every analog time point, process the ADC type elements. After every digital time point, solve the analog equations if there are DAC type elements. Use the event-driven strategy for digital elements. Mixed-signal simulation Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 6 Mixed-signal example: Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 7 Modern MOS transistors are very difficult to model analytically (small gate lengths, complex doping profiles etc.) Model development (if at all possible) is a long and tedious process: it could take a year! The LUT approach provides a quick way to estimate circuit performance without model development. Look-up table approach for MOS circuit simulation Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 8 Very easy to incorporate new elements SEQUEL is already being used at IIT Bombay for R and D, and course work. SEQUEL allows efficient “steady-state waveform” computation, which is not offered by any other general-purpose simulator. Power electronics examples Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 9 Power electronics examples Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 10 Power electronics examples Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 11 Very often, one is interested only in the steady-state solution and not how it was attained. This problem can be converted into a much smaller problem with the state variables as the only unknowns. The Newton-Raphson method can be used to solve the new problem. Steady-state waveform computation in Power Electronics Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 12 Example N1 N2 Buck Converter phase half-controlled bridge converter phase half wave rectifier Cuk Converter Boost Converter Induction motor problem phase diode bridge rectifier Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 13 Acknowledgements Prof. M.C.Chandorkar, Prof. B.G.Fernandes, Prof. V.Agarwal, Prof. K.Chatterjee, Prof. A.M.Kulkarni, Prof. S.V.Kulkarni from the PEPS group Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 14 Parallel implementation Simulation of “regular” circuits (e.g., displays) in collaboration with IITK GUI Commercial package? Future Plans Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 15 Fast Circuit Simulators at IIT Bombay Prof. H.Narayanan

Indian Institute of Technology Bombay 16 BREMICS (1986, 87, 90) for analog simulation of networks arising out of digital circuits (MOS transistors, resistors, capacitors) could handle 1000 nodes, 2000 edges. For the restricted class much faster (5 to 10 times) than SPICE on PCs. BITSIM ( ) general purpose (SPICE like) simulator based on conjugate gradient method for solution of linear equations and the hybrid analysis for writing equations. Could handle nodes, 8000 edges originally on SUN, now on Pentiums. Work done through several B.Tech and M.Tech. projects and through a research engineer (Dr. Subir Roy) Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 17 Currently “Large Circuit Simulations” by Parallelization is actively pursued The innermost subroutine of a general purpose simulator is a DC circuit analyzer (voltage sources, current sources, resistors, controlled sources) We parallelize this by the “Multiport Decomposition Method” Our simulator can currently solve 700,000 nodes, 1.4 million edges dc circuit in about 10 minutes using 8 processors (Pentium IV ‘s) connected through a 100 MBPS link Academia Industry Meet 2002, Electrical Engineering Department

Indian Institute of Technology Bombay 18 Academia Industry Meet 2002, Electrical Engineering Department pplication of large dc circuit analyzer Application of large dc circuit analyzer 100,000 RC Elements 1000 RC Elements Few terminals Same terminal behaviour 1) The Multi port Reduction Problem arises while modelling “short circuits” in chips at high frequency Continued

Indian Institute of Technology Bombay 19 we have constructed a few such reduction algorithms and implemented them. e.g. SARN reduces RC circuit with 100,000 nodes 200,000 edges 50 terminals in ½ hour to 1000 node circuit with 50 terminals. 2) Solving a large Combinational optimization problems a) Network flow problems b) Minimum cost flow problems Both of these can be posed as nonlinear static circuit analysis problems Innermost subroutine is a DC analyzer. Academia Industry Meet 2002, Electrical Engineering Department Continued

Indian Institute of Technology Bombay 20 Academia Industry Meet 2002, Electrical Engineering Department 3) Parallelizing large Sparse linear equations The equation are made to appear like those of a dc circuit and then given to the dc analyzer to solve by “Multi port Decomposition”.