EE/CS 480 Fall September, 2007 University of Portland School of Engineering Project Puffins Synchronous Chorded Keypad Input Chip Team RuthAnn Gobble Jordan Way Jonathan Wong Advisor Dr. Aziz Inan Dr. Peter Osterberg Industry Representative Mr. Wes Mickanin October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Overview Introduction Scorecard Additional Accomplishments Plans Issues/Concerns Conclusions October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Project Puffin will improve security of PIN input devices by exponentially increasing the number of possible PIN combinations. This is done through its use of chorded, synchronous inputs. This will benefit users of ATM’s and other Point of Sale (POS) devices by improving security while increasing pin combinations. Introduction

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Scorecard Previous month’s plans –Approve version 1.0 of Functional Spec –Approve version 1.0 of Project Plan –Submit B2Logic design for MOSIS fabrication –Decide on keypad input device –Acquire a CPLD device Shortcomings –All logic was tested correctly before final submission to MOSIS October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Additional Accomplishments Circuit Debugged and Imported into LEDIT October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Plans List your team’s plans for next month –Start acquiring parts for building demo-able circuit –Learn how to program a CPLD –Work on Design Review October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Milestones NumberDescriptionOriginal 8/28/07 Previous 8/28/07 Present 9/25/07 1Project Approval9/11/07 2Functional Spec /23/0710/05/07 3Functional Spec /28/0710/25/07 4 Functional Spec 1.010/05/0711/09/07 5 Project Plan /26/0710/30/07 6 Initial MOSIS submission11/01/0710/26/07 7 Conference Call w/ IR11/02/07 8 Project Plan /02/0711/03/07 9 Project Plan 1.011/09/07 10 Funding Approval11/09/07 11 Final MOSIS submission11/21/0711/16/07 12 Design Review12/07/07 October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Concerns/Issues Finding a compatible Keypad –Non-Matrix Keypad required –Separate bus for each key Programming CPLD –No team experience in programming such devices All possible tests were properly performed on logic before MOSIS submission Solutions –Create our own using button switches Not as professional looking, but still adequately displays the potential of our circuit in our MOSIS chip –Seek help from Golden Eagle –If MOSIS does not work the CPLD will October

EE/CS 480 Fall September, 2007 University of Portland School of Engineering Conclusion Introduction Scorecard Additional Accomplishments Plans Issues/Concerns Conclusion October