November 2006 SpaceOps 2010 Conference, Huntsville, Alabama By José Feiteirinha, Nuno Sebastião Date: 25-30 April 2010 Emulation Using the CellBE Processor.

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Presentation transcript:

November 2006 SpaceOps 2010 Conference, Huntsville, Alabama By José Feiteirinha, Nuno Sebastião Date: April 2010 Emulation Using the CellBE Processor

Purpose Introduction History and Motivation Emulation Techniques –Interpretation –Dynamic Translation The CellBE Processor –Architecture µLeon –Implementation Details –Performance Evaluation Conclusions Agenda

Purpose

Emulation of Onboard Software is in the Critical Path for SpaceCraft Simulators Heavily explored area Optimization techniques have been here for years now CellBE provides a new processor architecture design It’s performance as an emulator host should be considered Purpose

History and Motivation Performance of the new Leon2 processor is 3x to 5x higher than what traditional emulation techniques provide Previous studies have shown that modern emulation technologies can provide enough performance to emulate future space capable processors [PMarques 2006] Computer industry is providing more and more cores per CPU without many gains in the performance of individual cores Operation multi domain missions still require one computer per spacecraft simulator (i.e. increasing costs) Determinism and lateral application behavior are enemies

Emulation Techniques

Emulation Techniques - Interpretation Interpretation is the most common (and simple) emulation technique

Emulation Techniques - Interpretation Interpretation is also the slowest way to emulate

Emulation Techniques – Dynamic Translation Dynamic translation improves by blocking and writing into the host memory translated code in the host’s own instruction set

The Cell Processor

The CellBE Processor - Architecture One “Main” core – PPE – Power Processing Element Multiple “Side” cores – SPEs – Synergetic Processing Elements Operating System

µLeon

µLeon, a sub-set of the Leon2 processor ModuleLeon2 µ Leon Integer UnitSPARC Compliant Equivalent to 30% of the SPARC ISA Floating PointCo-ProcessorBuilt-in as part of the ISA Registers Windows8 windows of 32 registers Single register window UARTSTwo UARTSSingle state UART TimersTwo timers and one watchdog. n/a Imaginary processor composed of the critical requirements for evaluating the emulation of the real Leon2 processor

Performance Results Performance is lower than cutting edge processors

Performance Results Near deterministic behaviour

Conclusions

Conclusion CellBE provides lower throughput for emulation when compared to modern x86 based computers Commonly used architectures have high variance in performance and require the use of thresholds to ensure performance consistency CellBE provides a near deterministic platform for emulation Future processors with similar achitectures should be considered

Questions and Answers ? THANK YOU Paulo Marques: Damiano Guerrucci:

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