Class 02 DICCD

2 1- Transistors: Silicon Transistors are built out of silicon, a semiconductor Pure silicon is a poor conductor (no free charges) Doped silicon is a good conductor (free charges) –n-type (free negative charges, electrons) –p-type (free positive charges, holes)

3 1- MOS Transistors Metal oxide silicon (MOS) transistors: –Polysilicon (used to be metal) gate –Oxide (silicon dioxide) insulator –Doped silicon

4 1- Transistors: nMOS Gate = 0, it is OFF (source and drain are disconnected) Gate = 1, it is ON (channel between source and drain) Source= 0 => Drain=0 Source=1 => Drain=0.8 (Poor one)

1- Transistors: pMOS pMOS transistor is just the opposite – ON when Gate = 0 Source =0 => Drain = 0.2 (Poor zero) Source =1 => Drain = 1 – OFF when Gate = 1

Overview of MOS Metal-oxide semiconductor (MOS) integrated circuits (ICs) have become the dominant technology in the semiconductor industry With MOS, it is possible to have a lot of millions of transistor on a single chip It allows the fabrication of a complete 64-bit microprocessor or some Gbyte memory The main reason is that MOS ICs exceed the bipolar transistors: – in functional density (the number of functions performed on a single chip), – MOS transistors are simpler to fabricate

What is a MOS Transistor? MOS transistor consists of semiconductor material (silicon) on which is grown a thin layer ( nm) of insulating oxide, topped by a gate electrode The gate electrode was originally metal, specifically aluminium, but is now more commonly a layer of polycrystalline silicon (referred to as polysilicon) Source and drain pn-junctions are formed with a small overlap with the gate

Anatomy of a MOS FET Adding certain types of impurities to the silicon in a transistor changes its crystalline structure and enhances its ability to conduct electricity Silicon containing boron impurities is called p-type silicon p for positive or lacking electrons Silicon containing phosphorus impurities is called n-type silicon n for negative or having a majority of free electrons

MOS Transistor Transistors consist of three terminals; the source, the gate, and the drain In the n-type transistor, both the source and the drain are negatively-charged and sit on a positively-charged well of p-silicon

MOS Transistor When positive voltage is applied to the gate, electrons in the p-silicon are attracted to the area under the gate forming an electron channel between the source and the drain When positive voltage is applied to the drain, the electrons are pulled from the source to the drain. In this state the transistor is on

MOS Transistor If the voltage at the gate is removed, electrons aren't attracted to the area between the source and drain The pathway is broken and the transistor is turned off The binary function of transistors gives micro-processors the ability to perform many tasks from simple word processing to video editing Microprocessors have evolved to a point where transistors can execute hundreds of millions of instructions per second on a single chip Automobiles, medical devices, televisions, computers, and even the Space Shuttle use microprocessors They all rely on the flow of binary information made possible by the transistor

Terminals MOS transistors are always four-terminal devices In most applications, the substrate is often tied to the source

MOSFET vs. BJT n-channel MOSFET npn bipolar transistor gate source body drain collector base emitter

Complementary MOS Transistors (CMOS) If one were to fabricate PMOS and NMOS devices on the same substrate to build complementary MOS (CMOS) circuits, there would be a basic inconsistency in substrates This is solved by using a p-tub diffusion to create the background for the n-channel devices p n GND V DD A Y = A'

CMOS A variant of MOS transistor uses both n-channel and p-channel devices to make the fundamental building block – as inverter = „not” gate Its advantages: – lower power consumption – symmetry of design If in = +, n-channel device is on, p-channel is off, out is connected to - If in = -, n-channel is off, p-channel is on, out is connected to + No current flows through battery in either case P N out inin

Basic CMOS Logic Technology Based on the fundamental inverter circuit Transistors (two) are enhancement-mode MOSFETs – N-channel with its source grounded – P-channel with its source connected to +V Input: gates connected together Output: drains connected

Ideal Structure of a CMOS Intverter CMOS geometry (and manufacturing process) is more complicated than the NMOS p n+ SD p+ SD n

BiCMOS Technology n Bi-CMOS combines CMOS and bipolar (another transistor type) on one chip –CMOS for logic circuits –Bi-polar to drive larger electrical circuits off the chip

25 1- MOS Transistor Function

26 1- Transistor Function nMOS transistors pass good 0’s, so connect source to GND pMOS transistors pass good 1’s, so connect source to V DD

1- Copyright © 2007 Elsevier 1- CMOS Gates: NOT Gate AP1N1Y 0 1

1- CMOS Gates: NOT Gate AP1N1Y 0ONOFF1 1 ON0

1- CMOS Gates: NAND Gate ABP1P2N1N2Y

1- CMOS Gates: NAND Gate ABP1P2N1N2Y 00ON OFF 1 01ONOFF ON1 10OFFON OFF1 11 ON 0

31 1- CMOS Gate Structure

32 1- NOR Gate How do you build a three-input NOR gate?

33 1- NOR3 Gate Three-input NOR gate

34 1- Other CMOS Gates How do you build a two-input AND gate?

35 Copyright © 2007 Elsevier 1- Other CMOS Gates Two-input AND gate

1- Transmission Gates nMOS pass 1’s poorly pMOS pass 0’s poorly Transmission gate is a better switch – passes both 0 and 1 well When EN = 1, the switch is ON: – EN = 0 and A is connected to B When EN = 0, the switch is OFF: – A is not connected to B

1- Noise Anything that degrades the signal – E.g., resistance, power supply noise, coupling to neighboring wires, etc. Example: a gate (driver) could output a 5 volt signal but, because of resistance in a long wire, the signal could arrive at the receiver with a degraded value, for example, 4.5 volts

1- The Static Discipline Given logically valid inputs, every circuit element must produce logically valid outputs Discipline ourselves to use limited ranges of voltages to represent discrete values

1- Logic Levels

1- V DD Scaling Chips in the 1970’s and 1980’s were designed using V DD = 5 V As technology improved, V DD dropped – Avoid frying tiny transistors – Save power 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, 1.0 V, … Be careful connecting chips with different supply voltages

1- Power Consumption Power = Energy consumed per unit time Two types of power consumption: – Dynamic power consumption – Static power consumption

1- Dynamic Power Consumption Power to charge transistor gate capacitances The energy required to charge a capacitance, C, to V DD is CV DD 2 If the circuit is running at frequency f, and all transistors switch (from 1 to 0 or vice versa) at that frequency, the capacitor is charged f/2 times per second (discharging from 1 to 0 is free). P dynamic = ½CV DD 2 f

1- Static Power Consumption Power consumed when no gates are switching It is caused by the quiescent supply current, I DD, also called the leakage current Thus, the total static power consumption is: P static = I DD V DD

1- Power Consumption Example Estimate the power consumption of a wireless handheld computer – V DD = 1.2 V – C = 20 nF – f = 1 GHz – I DD = 20 mA

1- Power Consumption Example Estimate the power consumption of a wireless handheld computer – V DD = 1.2 V – C = 20 nF – f = 1 GHz – I DD = 20 mA P = ½CV DD 2 f + I DD V DD = ½(20 nF)(1.2 V) 2 (1 GHz) + (20 mA)(1.2 V) = 14.4 W

NMOS & PMOS In the n-channel transistor the semiconductor body (or substrate) is p-type and the source and drain diffusions are p-type In the discussion we shall use n-channel transistors (NMOS) for our analysis – The NMOS conducts via electrons The analysis for p-channel transistor (PMOS) follows simply by invoking duality – all semiconductor types are reversed – polarity of applied voltages are reversed – The PMOS conducts via holes by reversing all applied voltage polarities and semiconductor types

NMOS Operation With no voltage applied to gate, there is no conduction path between the source and drain When a voltage, positive with respect to the substrate, is applied to the gate and is of such a magnitude that it is greater then a certain threshold voltage V T, then electrons are attracted to the surface of the semiconductor – Electrons are minority carriers in the p-type substrate In fact, so many electrons are attached to the surface that an extremely thin (5 nm) channel is formed, where the semiconductor actually changes from p- to n-type

Transistor Gain Now, when a voltage is applied between source and drain, current can flow The current flow is via majority carriers, since electrons flow through all n-type materials Transistor gain results from the ability of the gate voltage to modulate the channel conductivity The electrons pile up at the oxide-semiconductor interface (i.e., the silicon surface) rather than flow through the gate circuit because the gate oxide prevents any dc gate current from flowing