Power Supply Control at NSLS-II Yuke Tian Control Group, NSLS-II, BNL (May 1, 2009 EPICS Collaboration Meeting, Vancouver)

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Presentation transcript:

Power Supply Control at NSLS-II Yuke Tian Control Group, NSLS-II, BNL (May 1, 2009 EPICS Collaboration Meeting, Vancouver)

Outline 1.Power supply control in accelerator 2. NSLS-II power supply control system 3.Synchronism, deterministic and reliability in NSLS-II power supply control 4.Summary EPICS Collaboration Meeting, Vancouver 2009

Power supply control in accelerator: magnets at NSLS-II EPICS Collaboration Meeting, Vancouver 2009

Power supply control in accelerator Power supply system functions  Establish particle orbit  Orbit correction  Beam-based alignment  Tune adjustment  Cure of chromaticity  Response matrix measurement  Power supply analysis Power supply system performance requirements and NSLS-II solutions  Reliability: power supply causes most of the failure time 1) Failures caused by harsh environments: moisture, dust, temperature etc. 2) Power supply control system failure: communication, IC parts failure etc.  Synchronization: power supply system needs to be synchronous with other accelerator subsystems to perform various functions. Usually the synchronization is done through timing system. EPICS Collaboration Meeting, Vancouver 2009 NSLS-II solutions: temperature controlled racks. NSLS-II solutions: redundant SDI links; Built-in diagnostic functions. NSLS-II solutions: fully synchronous system including BPMs, cell controllers and power supply controllers.

Power Supply Control at NSLS-II: overview Fast Orbit Feedback Synchronous Bus Ethernet – EPICS Channel Access Protocol Events/ / Timing Data CPUCPU Cell Controller FC1 FC2 FC3 SC1 SC2 SC6 Correctors DCPS 01 DC Power Supply Controllers For Multipole Magnets RFBPM 1 XRay BPM1 RFBPM 2 RFBPM 8 XRay BPM2 XRay BPM4 DCPS 02 DCPS 39 PS control For one cell EPICS Collaboration Meeting, Vancouver 2009 XRay BPM4

Power Supply Control at NSLS-II: overview EPICS Collaboration Meeting, Vancouver 2009 NSLS-II Power Supply Control System

NSLS-II Power Supply Control System: Cell Controller Detailed Structure of Cell Controller EPICS Collaboration Meeting, Vancouver 2009

NSLS-II Power Supply Control System: PSC, PSI, Regulator Power Supply Control System EPICS Collaboration Meeting, Vancouver 2009

NSLS-II Power Supply Control System: PSC Power Supply Controller (PSC) EPICS Collaboration Meeting, Vancouver 2009

NSLS-II Power Supply Control System: PSI EPICS Collaboration Meeting, Vancouver 2009 Power Supply Interface (PSI)

NSLS-II Power Supply Control System: Regulator EPICS Collaboration Meeting, Vancouver 2009 Current Regulator Module

Synchronism, Deterministic and Reliability in NSLS-II power supply control Clock Domains In Accelerators EPICS Collaboration Meeting, Vancouver 2009

Synchronism, deterministic and reliability in NSLS-II power supply control Synchronism in NSLS-II  125MHz clock (in sync with master oscillator) and fiducia will be distributed. We already have a very fine, low jitter clock. We can synchronize all circuit with this RF clock. We can timestamp every event with 8ns resolution. All the systems are talking with the same clock.  Traditional power supply control system receive a trigger pulse from timing system and use local oscillators to drive the DAC, ADC etc. EPICS Collaboration Meeting, Vancouver 2009 NSLS-II solutions: pushing synchronism to power supply control. The DAC, ADC and FPGA are synchronous with RF main oscillator. The local oscillators are for back up in case the RF main oscillator is not available.

Synchronism, deterministic and reliability in NSLS-II power supply control Pushing Synchronism to Power Supply Control at NSLS-II EPICS Collaboration Meeting, Vancouver 2009

Synchronism, deterministic and reliability in NSLS-II power supply control PS setpointPS readbackPS for fast correctors Total data for FOFB100Mbit/s SDI link 2 18-bit DAC 8-bit command (7 bytes/PS) bit ADC (20bytes) 6 PSSetpoints: 7x6=42 byte Readback: 20 byte Assume payload: 42 bytes 42 *7 =294 Byte (294*8)/100Mb = 24us Latency of Power Supply SDI Link EPICS Collaboration Meeting, Vancouver 2009

Summary EPICS Collaboration Meeting, Vancouver 2009 At NSLS-II, power supplies and the power supply control systems are designed with goals of high reliability, easy for diagnostics, and easy for integration. At NSLS-II, we are design a open source communication interface for power supply control system. It offers more advantages than other communications interface such as RS232, RS485, CAN etc. At NSLS-II, we are pushing synchronism to power supply control level. So, all the subsystems (BPM, PS, LLRF etc) are all synchronized, many accelerator applications can benefit from this synchronism.  Fast orbit feedback system 1) Synchronous distribution of BPM data (by SDI between cells) 2) Matrix math and regulation (done with the same clock) 3) Corrector PS actions (by SDI between PS controller)  Response matrix measurement: 1) Synchronous kick one or more magnets (by SDI between PS controller) 2) Synchronous measurement of the BPM data (by GigE interface)  Other applications: tune measurements, synchronous PS ramping etc.

EPICS Collaboration Meeting, Vancouver 2009 Acknowledgement Wing Louie (BNL) John Ricciardelli (BNL) George Ganetis (BNL) Larry Doolittle (LBNL) Bob Dalesio (BNL) Carlos Serrano (LBNL) Thank you !