BR 1/991 Two ways to think about logic signals Fixed logic convention –High voltage always means 1, TRUE, Asserted –Low voltage always means 0, FALSE,

Slides:



Advertisements
Similar presentations
Switching circuits Composed of switching elements called “gates” that implement logical blocks or switching expressions Positive logic convention (active.
Advertisements

Digital Integrated Circuits© Prentice Hall 1995 Combinational Logic COMBINATIONAL LOGIC.
DAT2343 Basic Logic Gates © Alan T. Pinck / Algonquin College; 2003.
Logic Gates.
Programmable Logic Controllers.
Lecture 6 More Logic Functions: NAND, NOR, XOR and XNOR
Instructor Dr Sameh Abdulatif
Logic Gates.
(CSC 102) Discrete Structures Lecture 5.
Chapter3: Gate-Level Minimization Part 2
SOP and POS Forms Notation.
IEEE’s Hands on Practical Electronics (HOPE) Lesson 9: CMOS, Digital Logic.
Programmable Logic Controllers
Universal Gates Sum of Products Products of Sum
CS 151 Digital Systems Design Lecture 11 NAND and XOR Implementations.
ENGIN112 L11: NAND and XOR Implementation September 26, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 11 NAND and XOR Implementations.
1 Two ways to think about logic signals Fixed logic convention –High voltage always means 1, TRUE, Asserted –Low voltage always means 0, FALSE, Negated.
Chapter 4 Logic Gates and Boolean Algebra. Introduction Logic gates are the actual physical implementations of the logical operators. These gates form.
Digital Logic Design Adil Waheed. BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION AND gate F = A.B OR gate F = A + B NOT gate F = A NAND gate F = A.B NOR gate.
 Seattle Pacific University EE Logic System DesignSOP-POS-1 The Connection: Truth Tables to Functions abcF abcF
Digitale basistechniek lesplan DatumTheoriePrakticumThuis 7 januariCombinational LogicTutorial Quartus II Herhaling Tutorial 12 JanuariCombinational LogicHalfadderFulladder.
CPS3340 COMPUTER ARCHITECTURE Fall Semester, /05/2013 Lecture 4: Basics of Logic Design Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER.
Unit 7 Multi-Level Gate Circuits Nand and Nor Gates Fundamentals of Logic Design Roth and Kinny.
LOGIC GATES.
Chapter 2 Two- Level Combinational Logic. Chapter Overview Logic Functions and Switches Not, AND, OR, NAND, NOR, XOR, XNOR Gate Logic Laws and Theorems.
NAND-NAND and NOR-NOR Circuits and Even and Odd Logic Functions
Using De’Morgan’s On of the most useful principles in boolean algebra is De’Morgan’s Theorem, which allows one to switch between ANDs and NORs and ORs.
1 K-Maps, Multi-level Circuits, Time Response Today: Reminder: Test #1, Thu 7-9pm K-map example, espressoFirst Hour: K-map example, espresso –Section 2.3.
Implementation of SOP/POS Expressions
C ONONICAL F ORMS OF B OOLEAN E XPRESSIONS. T HE S UM - OF - PRODUCTS (SOP) E XPRESSIONS When two or more product terms (Boolean Multiplication) are summed.
Lecture 09 NAND and XOR Implementations. Overview °Developing NAND circuits °Two-level implementations Convert from AND/OR to NAND (again!) °Multi-level.
1 Logic Gates and Circuits  Logic Gates Logic Gates  The Inverter The Inverter  The AND Gate The AND Gate  The OR Gate The OR Gate  The NAND Gate.
NAND-NAND and NOR-NOR Circuits and Even and Odd Logic Functions ECE 301 – Digital Electronics.
 Seattle Pacific University EE Logic System DesignSwitchLogic-1 Switches AB A simple on/off switch IF switch is closed THEN light is on + 5V -
Topic 4 – Switching Circuits. Serial vs. Parallel Transmission Circuit elements can be connected in either a serial or parallel manner. Serial implies.
ECE 171 Digital Circuits Chapter 6 Logic Circuits Herbert G. Mayer, PSU Status 1/16/2016 Copied with Permission from prof. Mark PSU ECE.
THE K-MAP.
CEC 220 Digital Circuit Design NAND/NOR Multi-Level Circuits
CEC 220 Digital Circuit Design SOP and POS forms Friday, January 23 CEC 220 Digital Circuit Design Slide 1 of 17.
COMPUTER ARCHITECTURE & OPERATIONS I Instructor: Yaohang Li.
Figure 5–5 Exclusive-OR logic diagram and symbols. Open file F05-05 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by.
CEC 220 Digital Circuit Design SOP and POS forms Friday, Sept 11 CEC 220 Digital Circuit Design Slide 1 of 17.
Combinational Logic Analysis. Basic Combinational Logic Circuits AND-OR logic AND-OR logic AND-OR logic produces an SOP expression. AND-OR logic produces.
Computer Architecture & Operations I
Computer Architecture & Operations I
Morgan Kaufmann Publishers
Logic Gates and Boolean Algebra
Logic Gates.
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Lecture 6 Topics Combinational Logic Circuits
Logic Gates.
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Computer Science 210 Computer Organization
Bushnell: Digital Systems Design Lecture 4
Elec 2607 Digital Switching Circuits
Universal gates.
Logic Gates.
ECE 171 Digital Circuits Chapter 6 Logic Circuits
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Lecture 5 Logistics Last lecture Today’s lecture
Digital Logic Experiment
Circuits, Truth Tables & Boolean Algebra
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Chapter 5 Combinational Logic Analysis
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Combinational Logic Circuit
Logic Gates AIM: To know the different types of logic gate
DIGITAL ELECTRONICS AND LOGIC GATES. ANALOG SIGNAL:- Analog signal is continuous time varying current or voltage signal.
Presentation transcript:

BR 1/991 Two ways to think about logic signals Fixed logic convention –High voltage always means 1, TRUE, Asserted –Low voltage always means 0, FALSE, Negated Mixed Logic convention –Can have High and Low true signals –High true signals means that high voltage means 1, True, asserted –Low true signals means that low voltage means 1, True, asserted –In real world, have both high and low true signals.

BR 1/992 High True vs. Low True Logic Different ways to say that a signal is high true –Is high if signal is TRUE, is low if signal is FALSE –Is high if signal is 1, is low if signal is 0 –Is high if signal is asserted, is low if signal is negated Different ways to say that a signal is low true –Is low if signal is TRUE, is high if signal is FALSE –Is low if signal is 1, is high if signal is 0 –Is low if signal is asserted, is high if signal is negated

BR 1/993 Asserted vs. Negated Asserted ALWAYS means that a signal is TRUE or logic 1. –Logic 1 could be represented by a HIGH voltage (high true) –Logic 0 could be represented by LOW voltage (low true) Negated ALWAYS means that a signal is FALSE or logic 0. –Logic 0 could be represented by a LOW voltage (high true) –Logic 0 could be represented by a HIGH voltage (low true)

BR 1/994 The Physical World When a button is pressed, it is asserted (true). However, its physical construction may output this as a LOW VOLTAGE (low true!!!) To the person pressing the button, they don’t know and don’t care that a low voltage is output when the button is pressed. They just know they have ASSERTED the button.

BR 1/995 THE Problem Have two buttons, each button outputs a low voltage (L) when pressed. Button A Button B VOLTAGE GATE Want a Voltage Gate that outputs a ‘H’ when both buttons are ASSERTED. The rest of the lecture will be devoted to determining the answer…..

BR 1/996 Examples of high, low signals Vdd Gnd L Vdd Gnd H High True button (switch) Switch open (negated), output is L Switch closed (asserted), output is H

BR 1/997 Examples of high, low signals Vdd Gnd H Vdd Gnd L Low True switch Switch open (negated), output is H Switch closed (asserted), output is L

BR 1/ Logic Gate A B Y L L H L H H H L H H H L AND gate with high true inputs, low true output A B Y A(L) B(L) A + B OR gate with low true inputs, high true output A B Y A B (AB) (L) Low True High True Low True AND OR

BR 1/999 Fixed Logic Polarity vs Mixed Logic Polarity In Fixed logic polarity, every signal is considered high true. In Mixed logic polarity, can have high, low true signals. –Low true signal names followed by ‘(L)’ to indicate low true

BR 1/9910 Fixed Polarity vs Mixed Polarity NAND, AND –Fixed: (AB)’ is read as “ A nand B” –Mixed: (AB) (L) is read “ A and B, low true”. NOR, OR –Fixed: (A+B)’ is read as “A nor B” –Mixed: (A+B) (L) is read “ A or B, low true”. NOT –Fixed: (A)’ is read as “NOT A” –Mixed: (A) (L) is read as “A, low true “

BR 1/ Logic Gate A Y L H H L A (A) (L) Buffer that converts high true input to low true output Buffer that converts low true input to high true output A Y A(L) A A Y Low True High True Low True

BR 1/ Logic Gate A B Y L L H L H L H L L H H L A B (A+B) (L) OR gate with high true inputs, low true output A B Y A(L) B(L) AB AND gate with low true inputs, high true output A B Y Low True High True Low True AND OR

BR 1/ Logic Gate A B Y L L L L H L H L L H H H A B AB AND gate with high true inputs, high true output A B Y A(L) B(L) (A + B) (L) OR gate with low true inputs, low true output A B Y High True Low True AND OR

BR 1/ Logic Gate A B Y L L L L H H H L H H H H A B A+B OR gate with high true inputs, high true output A B Y A(L) B(L) (AB)(L) AND gate with low true inputs, low true output A B Y High True Low True

BR 1/9915 Problem #1 Gate????? A(L) B(L) Y = A + B Two low true switches. When either switch A or switch B is asserted (pressed), want Y to be asserted. Y is high true.

BR 1/9916 Problem #1 (solution) A(L) B(L) Y = A + B Two low true switches. When either switch A or switch B is asserted (pressed), want Y to be asserted. Y is high true Logic Gate

BR 1/9917 Problem #2 Gate????? A B Y = A + B (L) Two high true switches. When either switch A or switch B is asserted (pressed), want Y to be asserted. Y is low true.

BR 1/9918 Problem #2 (solution) A B Y = A + B (L) Two high true switches. When either switch A or switch B is asserted (pressed), want Y to be asserted. Y is low true Logic Gate

BR 1/9919 Problem #3 Gate????? A(L) B(L) Y = AB (L) Two low true switches. When both switch A and switch B is asserted (pressed), want Y to be asserted. Y is low true.

BR 1/9920 Problem #3 (solution) A(L) B(L) Y = AB (L) 7432 Logic Gate Two low true switches. When both switch A and switch B is asserted (pressed), want Y to be asserted. Y is low true.

BR 1/9921 THE Problem (again) Have two buttons, each button outputs a low voltage (L) when pressed. Button A Button B Want a Voltage Gate that outputs a ‘H’ when both buttons are ASSERTED. Solution????? VOLTAGE GATE

BR 1/9922 THE Problem (solution) Have two buttons, each button outputs a low voltage (L) when pressed. Button A Button B Want a Voltage Gate that outputs a ‘H’ when both buttons are ASSERTED. When both A and B asserted (low true), output is asserted (high true) 7402 Gate

BR 1/9923 Mixed High True, Low True Inputs Gate????? A(L) Y = AB (L) One low true switch and one high true switche. When both switch A and switch B is asserted (pressed), want Y to be asserted. Y is low true. B

BR 1/9924 Mixed High True, Low True Inputs A(L) Y = AB (L) B Hmmm…. What is this? This does not match any of our gate types. We will have to convert one the gate inputs so that either we have BOTH high true inputs or BOTH low true inputs.

BR 1/9925 Mixed High True, Low True Inputs A(L) Y = AB (L) B Solution #1: Covert both gate inputs to low true Now we have a two input gate with both inputs low true. We can now match this to one of our two input gates. B (L)

BR 1/9926 Mixed High True, Low True Inputs A(L) Y = AB (L) B Solution #2: Covert both gate inputs to high true Now we have a two input gate with both inputs high true. We can now match this to one of our two input gates. A

BR 1/ Gate Summaries A B Y L L H L H H H L H H H L A B Y L L L L H H H L H H H H A B Y L L L L H L H L L H H H A B Y L L H L H L H L L H H L

BR 1/9928 Complete Logic Families A set of logic gates is complete if it can implement any boolean function. –Must be able to implement AND, OR, NOT function to be complete The 7400 gate is complete all by itself!!!! ANDOR NOT

BR 1/9929 Other Complete Logic Families The 7402 gate is also complete all by itself. AND OR NOT Any boolean equation can be implemented using either just 7400 gates or just 7402 gates.

BR 1/9930 Other Complete Logic Families (cont) The 7408 and 7404 together make a complete family The 7432 and 7404 together make a complete family

BR 1/9931 Sum of Products A boolean equation in the form: f = and_term + and_term … + and_term is called a Sum of Products (SOP). Y = AB + CD Implementing this logic in two levels of gating is easy. And-Or form A B C D A B C D Y Y Nand-Nand form drawn in mixed logic convention

BR 1/9932 Product of Sums A boolean equation in the form: f = (or_term) (or_term)… (or_term) is called a Product of Sums (POS). Y = (A+B) (C+D) Implementing this logic in two levels of gating is easy. Or-And form A B C D A B C D Y Y Nor-Nor form drawn in mixed logic convention

BR 1/9933 What do you have to know? Definitions of Assertion, Negation, High-True, Low-true Low, High true switch construction Low, High True boolean functions of Voltage gates Problems in the form of the switch problems given in these notes Complete Logic Familes NAND-NAND form drawn in mixed logic. NOR- NOR form drawn in mixed logic.