1 PFP MSR, 03/16/2010 Particles and Fields Package Monthly Status Review (MSR) March 16, 2010 Dave Curtis, PFP PM.

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Presentation transcript:

1 PFP MSR, 03/16/2010 Particles and Fields Package Monthly Status Review (MSR) March 16, 2010 Dave Curtis, PFP PM

2 PFP MSR, 03/16/2010 SSL Contracting Status Phase RR contract mod funding provided should carry us through March. Phase B/C/D Contract negotiations still pending

3 PFP MSR, 03/16/2010 Schedule Status Scheduler now working MAVEN part time –Expected to transition to full time this month. –She has started extracting instrument level schedules from the master schedule PFDPU schedule delivered Next key schedule milestone is finalizing parts lists by 4/15

4 PFP MSR, 03/16/2010 Manpower Continue ramping up –Closing in on new hires SEP EE Power Converter support SWIA/STATIC additional ME support QA team is short –Ron Jackson still out due to injuries Return now no sooner than June –Meanwhile SSL QA team is stretched thin with current work Jorg Fischer is taking the lead for now –A QA Audit of SSL is planed for April, further stretching the team –Looking for short term help – have feelers out to local institutions (LBNL, Stanford, etc). Scheduler full time this month!

5 PFP MSR, 03/16/2010 Manpower [2] Thermal Support is thin –Having trouble getting enough attention from the Thermal Engineer He got sucked into SPP proposal work, which will delay delivery of thermal models. –SWEA modeling of thruster heating mitigations, instrument preliminary models coming due –Requested GSFC support (for SWEA thermal)

6 PFP MSR, 03/16/2010 Accomplishments Developed Descope list with potential savings ROM Provided first MICDs (LPW, EUV, SEP) Provided draft connector list and pinouts, interacted with LM on details Provided purge requirements after encapsulation More in instrument sections…

7 PFP MSR, 03/16/2010 Ongoing Work Supporting Project planning process Supporting EMC, Payload, SDT working groups Supporting ICD development –MICD development in progress Instrument specifications in review Flight Software Requirements in review with instrument leads –Level 5 specification in work MAIP telecon with Project QA pending Parts selection and redesign to replace commercial with high rel parts (mostly STATIC) Started work of PFP FTA MICDs and Thermal Models in work Working with LM on LPW relocation to avoid thruster heating

8 PFP MSR, 03/16/2010 Ongoing Trades Second STATIC still under consideration –Alternative of keeping STATIC non-redundant involves added risk, significant extra reliability analysis work which will have to start soon PFDPU form factor, number of boards –Determining optimum board size to minimize mass within system design constraints –So far existing design not broken, but work not yet complete –An increase is possible as a number of boards are constrained for space – would have a mass impact

9 PFP MSR, 03/16/2010 Issues SEP FOV Issue (APP impingement) –Working with LM – longer APP boom improves the situation, but things are still changing SWEA Thruster, Aero heating –LM Rotated SWEA boom back to 45 degrees to Sun line to limit thruster heating of SWEA –Need to modify thermal characteristics of surfaces in SWEA aperture to avoid excessive heating - candidate solutions in work MAG issues meeting requirements with proximity to solar array –Juno qual panel tests indicates we have a problem –LM Palo Alto layups even worse –Magnetics Working Group considering options LPW boom thruster heating –Working to model heating, find a cooler location

10 PFP MSR, 03/16/2010 Issues [2] PFP SSL Parts costing at GSFC is significantly higher than planned –Most of the difference is in radiation testing –Need to decide on project policy for ELDRS (significant cost, questionable value added) –We should consider moving some radiation testing back to SSL High rate TID for parts SSL has ability to perform adequate functional testing SEL LBNL Significantly cheaper than current GSFC estimate

11 PFP MSR, 03/16/2010 Top Risks New: P10

12 PFP MSR, 03/16/2010 Risk List [1]

13 PFP MSR, 03/16/2010 Risks List [2]

14 PFP MSR, 03/16/2010 PFP Mass No change from last month Liens: –Second STATIC, ~3.69Kg (plus a small increment to PFDPU for additional interface), if approved –PFDPU possible increased board size, ~1kg (TBR)

15 PFP MSR, 03/16/2010 Mass Tracking Chart

16 PFP MSR, 03/16/2010 PFP Power No change since last month Liens: –Second STATIC: 5.75W –Expect to need operational heat during eclipse None allocated, amount needed pending thermal analysis

17 PFP MSR, 03/16/2010 PFP Power Trend

18 PFP MSR, 03/16/2010 PFP Data Rate Per allocations from Bruce

19 PFP MSR, 03/16/2010 MAVEN Magnetometer Status March 10, 2010 Connerney, Schnurr, Sheppard, etc.

20 PFP MSR, 03/16/2010 GSFC/MAG - Accomplishments in February MAG instrument definition Instrument specification – first draft (Rev 0) sent to SSL MAG instrument block diagram completed (Rev 0) MAG logic block diagram completed (Rev 0) MAG digital interface agreed upon with SSL MAG voltage requirements defined and power distribution block diagram completed (Rev 0) MAG schematics and board area study started, including the possibility of partitioning the AC heater circuit on a separate PCB from the analog sensor circuitry (like STEREO) Parts selection started, including identification of long lead time items.

21 PFP MSR, 03/16/2010 Near Term Plans & Open Issues MAG pre-PDR Peer Review planning in progress –Working dates availability with reviewers Steve Battel and Jeremy Karsch –Looking at May 25 and possibly May 28 (Battel availability) No Open Issues

22 PFP MSR, 03/16/2010 MAVEN PFP SWIA Status March 2010 Jasper Halekas, SWIA Lead

23 PFP MSR, 03/16/2010 SWIA Progress Fifth revision of instrument specifications –Updated outer grid and post design –Updated baseline anode and MCP mounting scheme Agreed on preliminary packaging, harnessing, and interconnect schemes Reviewed FSW specifications Reviewed third revision of block diagram Reviewed first draft schematics for digital board Got additional part time mechanical help for SWIA/STATIC (Greg Dalton) Started Bill Elliott working on mechanical details of anode/MCP mounting (biggest outstanding issue in mechanical design) Should be ready with currents/voltages for power supply design

24 PFP MSR, 03/16/2010 SWIA Issues Staffing –Still light on mechanical engineer time, but should be ready for PDR if we can progress quickly on anode/MCP mounting New hire ME job posted to augment team –Thermal modeling not started yet Chris Smith overloaded with other work Important issues regarding deflector coating and need for heater power to resolve Long Lead Parts –Probably need to start thinking about ordering A121 preamps Can take up to a year to get Hardly any spares from previous missions to use in testing –MCPs

25 PFP MSR, 03/16/2010 MAVEN PFP STATIC Status March 2010 Jim McFadden, STATIC Lead

26 PFP MSR, 03/16/2010 STATIC STATUS Instrument specification documents iterated twice and delivered Flight software requirements reviewed handed off to Flight software engineer FPGA requirements reviewed, recommended changes provided to systems engineer New ME (1/2 time) has been brought up to speed to take over from Bill Elliott. Additional ME (new hire) pending Prototype grids for carbon foils evaluated and new fabrication instructions developed. Radii for aperture housing and angle separation of dual-posts finalized (optics simulation) Carbon foil mounting scheme being developed (Marckwordt) Parts list being re-evaluated to reduce qualification costs Testing on Digital board and HV SWP board continuing.

27 PFP MSR, 03/16/2010 STATIC Schedule Status Completed Schedule Items –Instrument Specification / Flowdown –STATIC software requirement for PFDPU –STATIC harness specification –ESA Deflector Optics Design Incomplete Schedule Items –STATIC Preliminary Thermal design. Reason - Thermal design engineer still unavailable. Expected start date is 1-2 weeks. –STATIC packaging / interconnect design. Reason - Haven't settled on TDC to Digital board connectors. Not time critical and should get decided in the next couple weeks. –STATIC MCP specification and order. Reason - No immediate need since we have prototype MCPs. –Anode, Preamp, TDC EM Design update and parts selection. Reason - High parts qualification costs led to re-evaluation of the parts list. Selections are waiting on design engineer currently on travel. Selection is expected to complete in a couple weeks. Delays are not critical layout and fab are not scheduled until after PDR. –Update TOF 15kV/MCP HVPS Reason - HVPS engineer unavailable. This was on the fast track and the design/development need only be completed by PDR. Started Schedule Items –Sweep HVPS - prototype testing is continuing –Digital board prototype testing and design are continuing –LVPC - Specification provided to LVPS engineer –ESA Mechanical Design - new ME taking over aperture closer mechanism. This is behind schedule for a March 17 completion. Required completion date is prior to PDR. –Anode, Preamp, TDC EM Layout Mods - These are due in a couple weeks and are behind schedule, but really not needed until after PDR. Layout changes are waiting on part finalization.

28 PFP MSR, 03/16/2010 STATIC Issues Second STATIC issue needs to be resolved soon –Impacts Reliability analyses

29 PFP MSR, 03/16/2010 MAVEN PFP SWEA Status March 2010 Dave Mitchell, SWEA Lead

30 PFP MSR, 03/16/2010 SWEA Status SWEA Design –Instrument Specification – draft complete, under revision –SSL/CESR ICD – done –Identify changes to STEREO SWEA – done –Software Requirements – draft complete, under revision –Harness Specification - done –Packaging/Interconnect Design - done SWEA Digital –Digital Design – done –Parts Selection and Digital Schematic draft nearly complete (due 3/17) SWEA SSL Mechanical Design –Electronics box mechanical design – done

31 PFP MSR, 03/16/2010 Minor changes to the STEREO SWEA design are under study: –S –Simulations are underway to determine if a slight shift of the deflectors along the symmetry axis improves the angular response. –Rough calculations show that high emissivity coatings for the deflectors and toroidal grids are needed. Candidates have been identified (e.g., black chrome). More detailed thermal calculations are needed. SWEA Preliminary Thermal Design (due 2/3/10) –Behind schedule because of lack of thermal engineering support, which should become available later this month. SWEA Work in Progress Simulations show that scalloping the inner and outer hemispheres improves the scattered electron suppression. The optimal type of scalloping (rounded or saw tooth) is under study.

32 PFP MSR, 03/16/2010 MAVEN PFP SEP Status March 2010 Davin Larson, SEP Lead

33 PFP MSR, 03/16/2010 SEP Accomplishments Began modification of FPGA specs- –Reconfiguration to 2 identical actels –Baseline burst mode developed –Learned that DAP board must measure it own analog housekeeping Mechanical discussions –Explored change of connectors appears that 15 pin cannon may be to tight to fit. Must either: Use MDM connectors Extend length of box. Decision on Bias supply circuitry (mostly) made: –Strongly leaning toward capacitor diode stack instead of magnetics. Considered radiation problem for preamps: –Baseline is now A250F for preamp but using +/- 5 volts –Rough estimate of increase in power is small IDPU Board dimensions –Quick comparison of THEMIS vs STEREO board dimensions suggests it will not be a problem. EE job application listed – two candidates chosen to interview next Friday Specs sheet turned in. Discussion of nano-muscle took place: – see no need for change will probably stick with old design. Software requirements discussed on 3-12 – added 2.5 requirements. (one requirement turned into requirement on FPGA)

34 PFP MSR, 03/16/2010 SEP Open issues FOV issues no longer resolved. SPEC sheet still needs a review Finish modifying FPGA spec Have not decided on connector for sensors – Trade study MDM vs high density cannon. Better power estimate required. (must include power for shaping chain.) IDPU Board dimensions – More accurate area estimate must await board layout. EE job interview ahead

35 PFP MSR, 03/16/2010 MAVEN PFP PFDPU/GSE Status March 2010 Dorothy Gordon, Peter Berg, Tim Quinn, Harvey

36 PFP MSR, 03/16/2010 PFDPU Status Processor Board (DCB) specification in progress –ColdFire IP Core incorporated in an Actel FPGA –ProASIC FLASH part planned for Engineering Units (ETU) –RTAX2000S (Fused FPGA) planned for flight ColdFire Core Utilization (including mult, div. and BDM debug module): – SEQUENTIAL (R-cells) Used: 2930 Total: (27.25%) – COMB (C-cells) Used: 8492 Total: (39.49%) – LOGIC (R+C cells) Used: Total: (35.41%) – RAM/FIFO Used: 0 Total: 64 –FPGA daughter board facilitates testing of either FLASH or Fused FPGAs –PFDPU FPGA also includes Instrument Interfaces, Processor-Memory Bus Control/Registers, FLASH Memory Control, Timing Subsystem and Spacecraft Interface –Memory sizing in progress by the Software Lead. Software development tools –Freescale CodeWarrior Development suite is undergoing evaluation by the Software Lead. The initial results are promising.

37 PFP MSR, 03/16/2010 Flight Software Status Updated Software Development Plan in progress –Responding to Tom Jackson comments Flight Software Requirements (Level 4) reviewed with Instrument Leads Level 5 flow-down in progress Memory Sizing task in progress Development tools evaluated –Code size strongly dependent on usage of local vs global memory access Requirements Review planned for mid April Peer Review planned for May 12

38 PFP MSR, 03/16/2010 GSE Status (1) The MISG* Ethernet I/F Board (ZestET1) is being exercised with test code –Ethernet controller with user configurable FPGA Host Interface verified with pattern generator utility –FPGA to emulate MAVEN PFDPU and Instrument The MISG Specification first release and preliminary schematics for the Base (Interface) Board are being reviewed. *MAVEN Instrument Simulator / PFDPU Simulator

39 PFP MSR, 03/16/2010 GSE Status (2) GSE application development work continues –Receiving test data from the ZestET1 (Ethernet Data reception) –GSEOS data parsing has begun using data generated by the STATIC Prototype Board Next Steps –Layout/fabrication of Base GSE board –MISG FPGA development –Further testing with Host Code and integration with GSEOS