COMPUTER ENGINEERING AT THE UNIVERSITY OF WISCONSIN - MADISON.

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Presentation transcript:

COMPUTER ENGINEERING AT THE UNIVERSITY OF WISCONSIN - MADISON

Agenda Program Overview Research Activities

Program Overview of Computer Engineering Degrees Faculty Students

Degrees BS - Computer Engineering –New in January 2000 –Five Areas of Specialization VLSI Systems Design Embedded Systems Networks and Communications Electronic Design Automaton Electrical Engineering Applications Software MS - Electrical Engineering PhD - Electrical Engineering

Faculty Full Professors: Agrawal (also Comm.), Kime, Saluja, Smith Associate Professors: Hu (also DSP), Marleau (also Control), Ramanathan Assistant Professors (Chen, He, Lipasti)

Faculty Areas Current Hiring Target AREAFTEFTEFTE Architecture EDA Networks Embedded Systems VLSI [Anticipated Losses] TOTALS

Students Currently about 40 % of EE undergraduate degree candidates in Computer Engineering option program In future, expect 40 to 50 % of ECE undergraduates in Computer Engineering degree program About 20 to 25% of graduate EE degree candidates in Computer Engineering areas

Research Activities in Computer Engineering Architecture EDA Networks

Architecture Group James E. Smith –High performance processors Mikko Lipasti –High performance processors and systems James Goodman, Mark Hill, Guri Sohi, and David Wood –Computer Sciences

Jim Smith Next generation processors Instruction level distributed processing –Accommodate increasing on-chip wire delays –New microarchitectures based on hierarchy/replication Prediction/speculation to enhance instruction level parallelism Co-designed virtual machines –Support architecture via a combination of hw and sw –Dynamic optimization at runtime Funding from NSF, IBM, Sun and Intel

Jim Smith

Mikko Lipasti Research Interests: Computer architecture: both at the microarchitectural and system level Interaction of architecture with modern operating systems, advanced compilation techniques, and commercial server workloads Funding from IBM and UW Graduate School

Mikko Lipasti Research Goals: Application of value prediction and value locality to system level issues, including: – Memory consistency models – Cache coherence protocols – Read/write data sharing in commercial applications Application of value prediction to commercial workloads

UW Computer Architecture Group Comp. Sci. Research –Memory hierarchies: Goodman –Parallel systems: Hill, Wood –Processors: Sohi Computer Architecture Affiliates – IBM, Intel, Sun, HP, SGI/Cray, Compaq/DEC, etc. –Well-attended annual meeting

EDA Group Charles (Chuck) Kime –VLSI Design and Test Kewal Saluja –VLSI Design and Test Chung-Ping Chen –VLSI System Design and EDA Lei He –VLSI Design and Design Automation

Kewal Saluja Research interest: Manufacturing Testing of ICs Research projects: Test generation for sequential circuits using combinational test generators Efficient fault diagnosis for signature-based test methods Test algorithms for flash RAMs Iddq-based testing and diagnosis Fault-tolerance for systems using high performance architectures (joint project with Prof. Ramanathan) Funding from NSF and AT&T

Charlie Chen Research goal: Develop breakthrough technologies to facilitate high-end VLSI system design Research projects: Global design optimization –Early design planning, prediction, and budgeting –Methodology investigation for fast design convergence High-speed low-power noise-immune circuit style investigation and design automation –Dual V t, low voltage swing, and dynamic circuit design exploration Funding from UW Graduate School

Charlie Chen Research Projects: Signal integrity centric global interconnect synthesis –Full-chip-level repeater and interconnect planning –Giga-hertz clock synthesis –Power delivery planning and optimization –Full-chip-level signal integrity analysis and optimization –Cooper interconnect design investigation Signal integrity centric system-level design consideration –Noise-aware high-speed packaging and I/O design & automation with special attention at memory interface

Lei He Research interests: VLSI Design and Design Automation Research projects: Computer-aided design for giga-hertz circuits in nanometer technologies –Interconnect planning Process optimization for large volume designs Interconnect architecture optimization Interconnect-driven floorplanning –Interconnect synthesis RLC routing, shield and buffer insertion, sizing and spacing Funding from UW Graduate School

Lei He RLC extraction and model reduction –efficient full-chip level solution –randomized and structural process variations Design for manufacturability –processing variations and migrations –effects of sub-wavelength lithography Web-based VLSI design and design automation

Network Group Parmesh Ramanathan –Wireline and Wireless Networks Rajeev Agrawal (on leave) –Communication Networks Yu Hen Hu (on leave) –DSP, VLSI and Multimedia

Parmesh Ramanathan Research philosophy: Premise: the same-service-for-all paradigm of today’s Internet not adequate for emerging applications –Next Generation Internet (NGI) must support quality of service (QoS) differentiation Goal: Develop techniques for QoS differentiation in NGI –techniques consistent with Internet’s philosophy as opposed to telephone network’s philosophy

Parmesh Ramanathan Research projects: Wireline Architecture for relative differentiation in NGI –develop router mechanisms and user adaptation strategies –mainly algorithm development and theoretical analysis –validation through large scale simulations Prototyping QoS differentiation techniques –network testbed with several PCs and four Gigabit switches –compare the implementation and performance overheads of our solutions

Parmesh Ramanathan Research Topics: Wireless QoS support in high data rate (45 Mbps) wireless networks –collaborative project with other faculty members –investigate all key aspects of a wireless network in an integrated fashion (antennas, receiver structures, communication subsystems, networking issues) Packet data services in third generation cellular networks –develop solutions for QoS support within framework of IMT-2000 –prototype solutions on a wireless network testbed

Thanks Pete! For the Schneider Fellowship in Computer Engineering From Chuck, Jim, Kewal, Parmesh, Dick, Rajeev, Yu Hen, Charlie, Lei, Mikko, and DON! For the Schneider FacultyDevelopment Grant Program