Hardware-Software Co-partitioning for Distributed Embedded Systems.

Slides:



Advertisements
Similar presentations
Embedded System, A Brief Introduction
Advertisements

© 2004 Wayne Wolf Topics Task-level partitioning. Hardware/software partitioning.  Bus-based systems.
Hardware/ Software Partitioning 2011 年 12 月 09 日 Peter Marwedel TU Dortmund, Informatik 12 Germany Graphics: © Alexandra Nolte, Gesine Marwedel, 2003 These.
ECE-777 System Level Design and Automation Hardware/Software Co-design
ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2004 Serdar Taşıran.
Scheduling in Distributed Systems Gurmeet Singh CS 599 Lecture.
Object-Oriented Software Development CS 3331 Fall 2009.
® IBM Software Group © 2006 IBM Corporation Rational Software France Object-Oriented Analysis and Design with UML2 and Rational Software Modeler 04. Other.
- 1 -  P. Marwedel, Univ. Dortmund, Informatik 12, 05/06 Universität Dortmund Hardware/Software Codesign.
Week 1- Fall 2009 Dr. Kimberly E. Newman University of Colorado.
1 HW/SW Partitioning Embedded Systems Design. 2 Hardware/Software Codesign “Exploration of the system design space formed by combinations of hardware.
CS244-Introduction to Embedded Systems and Ubiquitous Computing Instructor: Eli Bozorgzadeh Computer Science Department UC Irvine Winter 2010.
Spring 08, Jan 15 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Introduction Vishwani D. Agrawal James J. Danaher.
Define Embedded Systems Small (?) Application Specific Computer Systems.
Scheduling with Optimized Communication for Time-Triggered Embedded Systems Slide 1 Scheduling with Optimized Communication for Time-Triggered Embedded.
System Partitioning Kris Kuchcinski
High-Level System Design Using Foresight Giovanna Di Marzo Serugendo IT / CE.
Winter-Spring 2001Codesign of Embedded Systems1 Introduction to HW/SW Co-Synthesis Algorithms Part of HW/SW Codesign of Embedded Systems Course (CE )
HW/SW Co-Synthesis of Dynamically Reconfigurable Embedded Systems HW/SW Partitioning and Scheduling Algorithms.
UML for Embedded Systems Development— Extensions; Hardware-Software CoDesign.
Project Management and Scheduling
Universität Dortmund  P. Marwedel, Univ. Dortmund, Informatik 12, 2003 Hardware/software partitioning  Functionality to be implemented in software.
1 Presenter: Ming-Shiun Yang Sah, A., Balakrishnan, M., Panda, P.R. Design, Automation & Test in Europe Conference & Exhibition, DATE ‘09. A Generic.
Operations Research Models
Course Outline DayContents Day 1 Introduction Motivation, definitions, properties of embedded systems, outline of the current course How to specify embedded.
EECE **** Embedded System Design
CSE 242A Integrated Circuit Layout Automation Lecture: Partitioning Winter 2009 Chung-Kuan Cheng.
CAD Techniques for IP-Based and System-On-Chip Designs Allen C.-H. Wu Department of Computer Science Tsing Hua University Hsinchu, Taiwan, R.O.C {
Software Pipelining for Stream Programs on Resource Constrained Multi-core Architectures IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEM 2012 Authors:
Automated Design of Custom Architecture Tulika Mitra
1 中華大學資訊工程學系 Ching-Hsien Hsu ( 許慶賢 ) Localization and Scheduling Techniques for Optimizing Communications on Heterogeneous.
Winter-Spring 2001Codesign of Embedded Systems1 Co-Synthesis Algorithms: HW/SW Partitioning Part of HW/SW Codesign of Embedded Systems Course (CE )
An Improved Algorithm to Accelerate Regular Expression Evaluation Author: Michela Becchi, Patrick Crowley Publisher: 3rd ACM/IEEE Symposium on Architecture.
Computer Science and Engineering Parallel and Distributed Processing CSE 8380 March 01, 2005 Session 14.
Using co-design techniques to increase the reliability of the Electronic control System for a Multilevel Power Converter Javier C. Brook, Francisco J.
1 Distributed Energy-Efficient Scheduling for Data-Intensive Applications with Deadline Constraints on Data Grids Cong Liu and Xiao Qin Auburn University.
1 Exploring Custom Instruction Synthesis for Application-Specific Instruction Set Processors with Multiple Design Objectives Lin, Hai Fei, Yunsi ACM/IEEE.
Hardware/Software Co-design Design of Hardware/Software Systems A Class Presentation for VLSI Course by : Akbar Sharifi Based on the work presented in.
High Performance Embedded Computing © 2007 Elsevier Chapter 7, part 2: Hardware/Software Co-Design High Performance Embedded Computing Wayne Wolf.
High Performance Embedded Computing © 2007 Elsevier Lecture 18: Hardware/Software Codesign Embedded Computing Systems Mikko Lipasti, adapted from M. Schulte.
Chapter 5B: Hardware/Software Codesign / Partitioning EECE **** Embedded System Design.
Patrick R. Haspel, University of Mannheim1 FutureDAQ Kick-off Network Design Space Exploration andAnalysis Computer Architecture Group Prof. Brüning Patrick.
- 1 - EE898_HW/SW Partitioning Hardware/software partitioning  Functionality to be implemented in software or in hardware? No need to consider special.
CS244-Introduction to Embedded Systems and Ubiquitous Computing Instructor: Eli Bozorgzadeh Computer Science Department UC Irvine Winter 2010.
Resource Mapping and Scheduling for Heterogeneous Network Processor Systems Liang Yang, Tushar Gohad, Pavel Ghosh, Devesh Sinha, Arunabha Sen and Andrea.
DIPARTIMENTO DI ELETTRONICA E INFORMAZIONE Novel, Emerging Computing System Technologies Smart Technologies for Effective Reconfiguration: The FASTER approach.
Task Graph Scheduling for RTR Paper Review By Gregor Scott.
6. A PPLICATION MAPPING 6.3 HW/SW partitioning 6.4 Mapping to heterogeneous multi-processors 1 6. Application mapping (part 2)
A Systematic Approach to the Design of Distributed Wearable Systems Urs Anliker, Jan Beutel, Matthias Dyer, Rolf Enzler, Paul Lukowicz Computer Engineering.
1 Iterative Integer Programming Formulation for Robust Resource Allocation in Dynamic Real-Time Systems Sethavidh Gertphol and Viktor K. Prasanna University.
1 Copyright  2001 Pao-Ann Hsiung SW HW Module Outline l Introduction l Unified HW/SW Representations l HW/SW Partitioning Techniques l Integrated HW/SW.
CHAMELEON: A Hierarchical Clustering Algorithm Using Dynamic Modeling Author:George et al. Advisor:Dr. Hsu Graduate:ZenJohn Huang IDSL seminar 2001/10/23.
A flexible simulator for control- dominated distributed real-time systems Johannes Petersson IDA/SaS/ESLAB Johannes Petersson IDA/SaS/ESLAB Master’s Thesis.
1 Copyright  2001 Pao-Ann Hsiung SW HW Module Outline l Introduction l Unified HW/SW Representations l HW/SW Partitioning Techniques l Integrated HW/SW.
High Performance Embedded Computing © 2007 Elsevier Chapter 7, part 3: Hardware/Software Co-Design High Performance Embedded Computing Wayne Wolf.
Abstraction :Managing Design Complexity through High-Level C-Model Verification Mike Andrews Mentor Graphics Yuan-Shiu Chen present.
Winter-Spring 2001Codesign of Embedded Systems1 Co-Synthesis Algorithms: Distributed System Co- Synthesis Part of HW/SW Codesign of Embedded Systems Course.
Physically Aware HW/SW Partitioning for Reconfigurable Architectures with Partial Dynamic Reconfiguration Sudarshan Banarjee, Elaheh Bozorgzadeh, Nikil.
21/1/ Analysis - Model of real-world situation - What ? System Design - Overall architecture (sub-systems) Object Design - Refinement of Design.
An Energy-Efficient Approach for Real-Time Tracking of Moving Objects in Multi-Level Sensor Networks Vincent S. Tseng, Eric H. C. Lu, & Kawuu W. Lin Institute.
Methodology Review Chapter 7 Part 2: Design Methodology Object-Oriented Modeling and Design Byung-Hyun Ha
Hardware/Software Co-Design of Complex Embedded System NIKOLAOS S. VOROS, LUIS SANCHES, ALEJANDRO ALONSO, ALEXIOS N. BIRBAS, MICHAEL BIRBAS, AHMED JERRAYA.
Euro-Par, HASTE: An Adaptive Middleware for Supporting Time-Critical Event Handling in Distributed Environments ICAC 2008 Conference June 2 nd,
Parametric calibration of speed–density relationships in mesoscopic traffic simulator with data mining Adviser: Yu-Chiang Li Speaker: Gung-Shian Lin Date:2009/10/20.
The Hardware / Software Tradeoff -John Burnette-
Parametric calibration of speed–density relationships in mesoscopic traffic simulator with data mining Adviser: Yu-Chiang Li Speaker: Gung-Shian Lin Date:2009/10/20.
CSCI1600: Embedded and Real Time Software
Sungho Kang Yonsei University
Department of Electrical Engineering Joint work with Jiong Luo
CSCI1600: Embedded and Real Time Software
Presentation transcript:

Hardware-Software Co-partitioning for Distributed Embedded Systems

2 Outline 1. Introduction 2. Related Work 3. Distributed Embedded System and System Model 4. Multi-Level Partitioning 5. Case Study

3 1. Introduction Hardware-Software Codesign Distributed Embedded System Motivation  Task Graph  Physical Restrictions Distributed Embedded System Codesign (DESC)  Object Modeling Technique (OMT)  Linear Hybrid Automata (LHA)  SES Models

4 1. Introduction (cont’) Multi-Level Partitioning  Partitioning Algorithm  Sharing, Clustering Case Studies

5 2. Related Work Target Embedded System  1-CPU and 1-ASIC Topology  n-CPU and m-ASIC Topology Optimal Codesign Heuristic Codesign

6 2. Related Work (cont’) Codesign of 1-CPU and 1-ASIC Topology  Kumar et al  Kalavade and Lee 1993  Thomas et al  Gupta and De Micheli 1993  Barros et al. 1994

7 2. Related Work (cont’) Codesign of n-CPU and m-ASIC Topology  Optimal Codesign Approaches: Mixed integer linear programming Prakash and Parker 1992 Exhaustive search Wolf 1994, Haworth et al D’Ambrosio and Hu 1994

8 2. Related Work (cont’)  Heuristic Codesign Approaches: Iterative and Constructive Iterative: Dick and Jha MOGAC, CORDS Dick and Jha MOCYN

9 2. Related Work (cont’) Constructive: Wolf object-oriented Yen and Wolf sensitivity-driven Dave, Lakshminarayana, and Jha COSYN Dave and Jha COFTA Dave and Jha COHRA Our proposed: Distributed Embedded System Codesign (DESC)

10 3. Distributed Embedded Systems and System Models An embedded computer system is a system which uses computers but is not a general- purpose computer. In 1971, there were about 142,000 computers world-wide. In 1999, there are now some 350 to 400 million personal computers alone and at least of magnitude more embedded devices.

11 3. Distributed Embedded Systems and System Models (cont’) There are several reasons to build distributed hardware engine for embedded system  Cheaper  Faster response time  The devices control may be physically distributed

12 3. Distributed Embedded Systems and System Models (cont’) System Models  Object Modeling Technique (OMT) Models Object Model Dynamic Model Functional Model

13 3. Distributed Embedded Systems and System Models (cont’)  Linear Hybrid Automata (LHA) Models Internal system model For verifying systems  SES Models SES/workbench is a popular modeling and simulation tool for system performance evaluation

14 4. Multi-Level Partitioning Multi-Level Partitioning (MLP) Three Main Phases  Codesign Space Exploration (CSE)  System Structural Partitioning (SSP)  Binary Search Copartitioning (BSC)

Fig. 5.1 Overall Flow Chart of Multi-Level Partitioning Overall Flow Chart of Multi-Level Partitioning

Detailed Flow Diagram of Multi-Level Partitioning

17 where x is a object CPD: Cost-Performance Difference 4. Multi-Level Partitioning (cont’)

18 4. Multi-Level Partitioning (cont’) CPU/ASIC Sharing Sharing Threshold Distance (STD) SLI: Subsystem Location Inter-distance

19  Interconnect Cost (IC) Model IC (X 1, X 2 ) = α × SLI(S 1, S 2 ) × #Link(X 1, S 2 ) × BW(X 1, S 2 ) + EC(X 1 ) SLI: Subsystem Location Inter-distance S 1 and S 2 : Subsystems X 1 and X 2 : A component (PE or ASIC) α : A parameter that depends on the interconnection technology #Link(X 1, S 2 ) : The number of links between X 1 and S 2 BW(X 1, S 2 ) : The communication bandwidth between X 1 and S 2 EC(X 1 ) : The cost for enhancing X 1 such that both S 1 and S 2 can use X Multi-Level Partitioning (cont’)

20 Algorithm 5.2 Share Components Algorithm Share_Components(s){ /* s=, s i =(s i1, s i2 ) where s i1 is the number of PE in subsystem S i and s i2 is the number of ASIC in subsystem S i. s i1, s i2  {0,1, ……} */ for (i = 1, i  , i++) { for (j = i, j  , j++) { if SLI(s i, s j )  STD { if (s i1  0  s j1  0) Share_PE(S i, S j ); /* Refer to Algorithm 5.3 */ if (s i2  0  s j2  0) Share_ASIC(S i, S j ); /* Refer to Algorithm 5.4 */ } 4. Multi-Level Partitioning (cont’)

21 Hardware Clustering and Software Grouping  In DESC, hardware clustering is based on Kernighan and Lin basic graph partitioning algorithm, but it is enhanced to include DEMS characteristics.  Software grouping technique similar to load balancing on multiple processors 4. Multi-Level Partitioning (cont’)

22 4. Multi-Level Partitioning (cont’) Analysis and Validation of MLP  Complexity analysis r: the number of objects  : the number of subsystems

23 5. Case Studies Vehicle Parking Management System (VPMS) Examples of Sharing and Clustering in MLP Application of MLP to Coal Mine System

24 Vehicle Parking Management System (VPMS)  VPMS Specifications A VPMS consists of three subsystems: ENTRY management, EXIT management, and DISPLAY. An ENTRY (or an EXIT) subsystem consists of three parts: a ticket facility, a gate controlled by a gate-motor, and a pair of sensors. A DISPLAY subsystem 5. Case Studies (cont’)

25  Constraints for the VPMS system A maximum cost of $1,300, A maximum display response time of 14,000 µs, and A maximum ENTRY (EXIT) gate response time of 250 µs. 7. Case Study (cont’)

26  Specification and Mapping of VPMS VPMS is described using OMT models consisting of Object Dynamic, and Functional models. 5. Case Study (cont’)

Object Model of VPMS

Dynamic Model of a DISPLAY Subsystem

Functional Model of a DISPLAY Subsystem

30 LHA Model of VPMS  Hardware LHA Model  Software LHA Model 5. Case Study (cont’)

Hardware LHA of a DISPLAY Subsystem

Software LHA of a DISPLAY Subsystem

33 SES Models  Using SES/workbench Model A car-simulator An ENTRY management subsystem An EXIT management subsystem A DISPLAY subsystem 5. Case Study (cont’)

34  SES Model of a DISPLAY Subsystem 5. Case Study (cont’)

35 Applying MLP to VPMS 5. Case Study (cont’)

36 5. Case Study (cont’)

37 VPMS Emulation  Block Diagram for Prototype D(S C, H S, S M ) 5. Case Study (cont’)

38  VPMS Emulation Results 5. Case Study (cont’)

39 Examples of Sharing and Clustering in MLP  Sharing and clustering techniques in MLP based on several variants of the VPMS case study.  How object oriented modeling can be advantageous in hierarchical partitioning.  Coal mine control and monitoring system 5. Case Study (cont’)

Advantage of Sharing in MLP

Advantage of Clustering in MLP