Computer Organization TI1400 Alexandru Iosup (lecturer) Parallel and Distributed Systems

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Computer Organization TI1400 Alexandru Iosup (lecturer) Parallel and Distributed Systems Course website:

A Digital Computer Source: CPU Type Intel Core i5 2430M CPU Speed 2.4 GHz M/board chipset Intel Mobile QM67 Memory 4GB DDR3 (SODIMM) Video card NVIDIA Quadro NVS 4200M Max. Res. 1600x900 (WXGA++) HDD 500GB at 5.400RPM Interface USB/FW eSATA, 2x USB 2.0 Network wired Ethernet 1Gbps … …

A Digital Computer M/board floorplan. Source: Intel Corp., and Linda Null and Julia Lobur.

A CPU IA-32 floorplan. Source: Intel Corp.

TI1400/2012: Course Goals “gain fundamental knowledge about the organization and architecture of computer systems” Organization = all physical aspects of the computer Circuits, memory types, signals, making things tick Architecture = all logical aspects Let programmers interact with the working system Instruction sets, opcodes, data structures, addressing, memory access, I/O mechanisms, etc.

Know Thy Platform Programming hot functions Programming optimized functions Linear algebra (BLAS) Video, sound, and security codecs Vertex and pixel shaders on GPUs Building low-power devices (embed: $1Tn/2011) Real-time platforms Games, Simulations, Navigation systems, Medical equipment Matching algorithm and platform: improve performance up to a factor of 100 (Michael Abrash: Doom, Quake, …)

System Tuning ATARI VCS (1977) Home entertainment system Video, Sound, Games Pluggables: joystick, dance mat, … Today we use Wiis and XBox360s Ultra-low-cost platform CPU: MOS 6502 at 1MHz low cost, low mem GFX, sound: 4 KB ROM (max 8K) State, score: 128 bytes RAM (Apple II had 4 kilo-bytes) RAM/Input/Output/Timer controller “Any mistake in timing produced visual artifacts, a problem programmers called racing the beam.”

Program Optimization Peak vs Real Performance “One EC2 Compute Unit (ECU) provides the equivalent CPU capacity of a GHz 2007 Opteron or 2007 Xeon processor.” Amazon EC2 Source: Original code w/o SIMD ACML ~90% ~10% Peak <50%

Evolution of Computing The “Data Deluge”: Facts and Predictions "Everywhere you look, the quantity of information in the world is soaring. According to one estimate, mankind created 150 exabytes (billion gigabytes) of data in This year, it will create 1,200 exabytes. Merely keeping up with this flood, and storing the bits that might be useful, is difficult enough. Analysing it, to spot patterns and extract useful information, is harder still.“ The Data Deluge, The Economist, 25 February 2010.

Doom (1993) “For me, while I do take a lot of pride in shipping a great product, the achievements along the way are more memorable. I don't remember any of our older product releases, but I remember the important insights all the way back to using CRTC wraparound for infinite smooth scrolling in Keen (actually, all the way back to understanding the virtues of structures over parallel arrays in apple II assembly language…) Knowledge builds on knowledge.” John Carmack,.plan, Feb 1998

Conceptual Map of TI1400/2012 L3. ISAs L5. IA-32/MIPS L7.1. I/O + OS L8. Pipelining + Perf.L9. Large Sys. You are here L0. Introduction Rd. Prog. Principles L6. Basic Processing Unit L4. Assembler L7.1. Memory + Perf. L1. Digital LogicL2. Digital Data

Course Mapping to CS Curricula of ACM/IEEE 2008 and TU Delft Body of Knowledge: Architecture and Organization AR1. Digital Logic and Data Representation [core] AR2. Computer Architecture and Organization [core] AR3. Interfacing and I/O Strategies [core] AR4. Memory Architecture [core] AR5. Functional Organization [core] AR6. Multiprocessing [core] AR7. Performance Enhancements [elective] AR8. Directions in Computing [elective] TU Delft: Logic, Digital Logic, Programming Fundamentals, Operating Systems, Distributed Algorithms and Systems, …

TU-Delft TI1400/12-PDS 13 Course Material (The Textbook) Class Material V.C. Hamacher, Z.G. Vranesic, S.G. Zaky, Computer Organization, 2002, McGraw-Hill, 5 th Ed. Reader: Computer Organization, January 2007 Lecture Slides Info: BlackBoard ATTN: textbook via CH (second-hand) Amazon.com or bol.com McGraw Hill link (e-version, available hopefully soon)

TU-Delft TI1400/12-PDS 14 Coarse Time Allocation Classes 2 hours per week (see College Rooster) Instructions 1 hour per week (see College Rooster) Laboratory 5 mandatory + 2 bonus assignments in Q4 Self-Study 6-8 hours per week or you may fail

Detailed Time Allocation 1. Digital Logic4h1/2h-10h LectureTutorialLabSelf-Study 2. Data Repr./Processing4h1/2h-10h 3. ISAs/Assembler6h2h16+8h20h 4. Basic Processing Unit4h2h-10h 5. I/O + OS Principles2h1h-10h 6. Memory + Performance2h1h-10h 7. Pipelining + Perf.2h -10h 8. Programming Principles2h--5h 9. Parallelism/Distribution2h1h-10h Total28h14h16+8h95h

TI1400/2012 Schedule

TU-Delft TI1400/12-PDS The NEW Grading System 1. Course Points2. Access Tokens3. Brownie Points 10,000 for straight correct exam Q +500 entry quiz +50 activity in Lab/Lecture/Tutorial +1,000 lab bonus # lab bonus #1 +25 correct end-lecture quiz Bonus Lab assignments Advanced topics (GPUs, clouds) Discuss w Lecturer Start with 1 Propose Exam Qs Rec. letter I will bake brownies for you! (but not force you to eat them) +1,000 team self-study

TU-Delft TI1400/12-PDS 18 Mid-Term and Final Exams In week 7 of Q3 there is a mid-term exam of 10 Qs You can take the exam, but you do not have to Mid-term score counts for 1/3 score from Qs You can only win by taking the quiz! Final exam of 30 Qs 10 Qs overlap with mid-term exam 20 Qs about new material Twice per year Old examinations can be found at the in1705 web pages

TU-Delft TI1400/12-PDS 19 Overview ti1400 [1/4] Week 1-2 : Basic concepts, digital logic, memory elements, finite state machines Week 1 : Hamacher A.1 to A.6 Week 2 : Hamacher A.7 to A.14 Week 3-4 : Number representations and arithmetic Week 3 : Hamacher 2.1, 6.1 Week 4 : Hamacher 6.3 to 6.8

TU-Delft TI1400/12-PDS 20 Overview ti1400 [2/4] Week 5-6 : Instructions, addressing modes, assembler Week 5 : Hamacher 2.2 to 2.4 Week 6 : Hamacher 2.5 to 2.13 Week 7 : IA-32 architecture Week 7 : Hamacher 3.16 to 3.25

TU-Delft TI1400/12-PDS 21 Overview ti1400 [3/4] Week 8-9 : The Processing Unit Week 8 : Hamacher 7 Week 9 : Hamacher 7 Week : Input/Output and Memory Organization Week 10 : Hamacher 2.7 and 4 Week 11 : Hamacher 5

TU-Delft TI1400/12-PDS 22 Overview ti1400 [4/4] Week 12 : Pipelining Week 12 : Hamacher 8 Week 13 : Language levels and translation Week 13 : Reader Week 14 : Large Systems Week 14 : Hamacher 12

TU-Delft TI1400/12-PDS Questions? Course website: