Powering: Status & Outlook CEC Meeting, Karlsruhe May 18th, 2011 Katja Klein 1. Physikalisches Institut B RWTH Aachen University.

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Presentation transcript:

Powering: Status & Outlook CEC Meeting, Karlsruhe May 18th, 2011 Katja Klein 1. Physikalisches Institut B RWTH Aachen University

Overview Katja Klein2Powering - Status and Outlook Novel power distribution schemes are being / have to be developed for: (1) Phase-1 pixel detector (target date ~ shutdown 2016/2017)  DC-DC buck converters with conversion factor of ~ 3 (2)Phase-2 tracker upgrade (target year  2020) a.Readout modules b.pT modules c.GBT system  DC-DC conversion scheme with conversion factor of ~ 10 (3)Phase-2 pixel detector??

Overview Katja Klein3Powering - Status and Outlook Work is discussed within the Tracker Upgrade Power WG (~ 4x / year) Active groups: ITA (Aragon), Aachen (  CEC), CERN, Fermilab, PSI,... Work has settled on two types of converters  Buck converter  Switched capacitor converter... and can be divided into three categories:  Generic R&D: ASIC development, optimization for high efficiency and low noise, development of shielding & inductor  Phase-1 specific R&D: system design & system tests with pixel modules  Phase-2 specific R&D: development of switched capacitor converter and its test with CMS Binary Chip

Challenges Radiation tolerance of high voltage (~15V) power transistors Magnetic field tolerance  air-core inductor  radiated emissions Conductive switching noise Maximization of efficiency & minimization of material and size DC-DC Buck Converter Katja Klein4Powering - Status and Outlook High currents (~3A) with high efficiency Comparably simple & compact Output voltage regulation by Pulse Width Modulation logic (not shown) Idea: on-detector voltage conversion: P = U  I = (rU)  (I/r) with r > 1  lower power losses in cables & less material Duty cycle D = t 1, on /T Conversion ratio r = V in /V out = I out /I in = 1/D DC-DC buck converters ASIC

Switched Capacitor Converter Katja Klein5Powering - Status and Outlook Pro: no air-core inductor needed  no magnetic radiation, less material Con: can provide only relatively small currents (< 100mA), no regulation Targeting phase-2 application  Could be combined with buck converter in a 2-step conversion scheme, to reduce required buck conversion ratio and thus improve efficiency (e.g. 10V  2.5V  1.2V)  Could derive digital (0.9V) from analogue (1.2V) voltage Based on capacitors (instead of inductor) as energy storage element, “charge pump“ Driving logic on-chip (possibly inside ROC), capacitors external

Buck Converter ASICs Katja Klein6Powering - Status and Outlook ASIC includes transistors and voltage regulation circuit ASIC is being developed within CERN electronics group (F. Faccio et al.) Radiation tolerance of many semi-conductor technologies evaluated  Best candidate is AMIS I3T µm (ON Semiconductor, US) - functional up to dose of 300Mrad & fluence of 5  p/cm 2 - no Single Event Burnout effect AMIS prototypes:  AMIS1 (2008)  AMIS2 (2009), some bugs, but used in system tests  AMIS3 (just back from foundry), small improvements wrt AMIS2  AMIS4 (submitted in January 11), full and almost final functionality Work with second supplier (IHP, Germany) to improve radiation tolerance - two prototypes in 2010, but development on-hold due to rad. tolerance issues SEB = Single Event Burnout = ionizing particle in source turns parasitic npn transistor on  destructive current

Buck Converter ASICs Katja Klein7Powering - Status and Outlook F. Faccio, ACES 2011

Aachen DC-DC Converter Development Katja Klein8Powering - Status and Outlook ASIC: AMIS2 by CERN I out < 3A V in < 12V V out configurable; 2.5V & 3.3V f s configurable, e.g. 1.3MHz PCB: 2 copper layers a 35µm 0.3mm thick Large ground area on bottom for cooling Toroidal inductor: L = 450nH R DC = 40m  Shield A = 28 x 16 mm 2 M  2.5g 3.8% of a radiation length “PIX_V7“: Design guidelines from CERN group have been implemented. Pi-filters at in- and output

The Shield Katja Klein9Powering - Status and Outlook The shield has three functions: 1) to shield radiated emissions from inductor 2) to reduce conducted noise by means of segregation between noisy and quiet parts of board (less coupling) 3) to provide cooling contact for coil through its solder connection to PCB, since cooling through contact wires not sufficient We are currently investigating several technologies: Aluminium shields of 90µm thickness (milled in our Workshop) Plastic shields (PEEK) coated with a metall layer (outside, inside & outside)  Aluminium sputtered (5 - 10µm)  Copper/Nickel sputtered ( µm)  Copper, galvanic deposition ...

Efficiency Katja Klein10Powering - Status and Outlook PIX_V7, V out = 3.3V Phase 1 conditions: V out = 3.3V or 2.5V, I out < 2.8A, conversion ratio of  about 75% efficiency: ok Phase 2 conditions: V out = 1.25V, I out = 3A, conversion ratio of  about 55% efficiency: too low  Improvements expected from new ASICs, bump bonding, IHP?,...?  If all fails: move to 2-step conversion scheme PIX_V4_R3, V out = 1.25V

Conductive Noise Katja Klein11Powering - Status and Outlook Differential Mode, no shieldCommon Mode, no shield Differential Mode, with shieldCommon Mode, with shield Further reduction possible for higher switching frequency (  lower efficiency) PIX_V7 output noise V out = 3.3V V in = 10V f s = 1.3MHz L = 450nH

Shielding from Radiated Noise Katja Klein12Powering - Status and Outlook Shielding of magnetic field: Eddy currents in metallic shield Need to shield all parts with large current variations, not only the coil 90µm milled Aluminium shield works fine (but is very expensive!) Plastic shield coated with 30µm Cu worse and adds ~ 40% more material (but probably cheaper...) No shield90µm Alu30µm Cu

Switched Capacitor Converter ASIC Katja Klein13Powering - Status and Outlook Work by Michal Bochenek (CERN PH-ESE) ASIC in IBM 0.13µm, conv. ratio ~ 2 Simulated efficiency = 97% for 60mA output current Large voltage spikes due to wire bond inductance Back since February, results not yet presented Implemented in CMS Binary Chip (CBC) Simulation without bonds Simulation with bonds

CBC Power Aspects Katja Klein14Powering - Status and Outlook 130nm chip for outer tracker, under test since February Power consumption < 0.3mW/channel for 5pF strips  80mW for V Three powering options implemented 1) Direct (1.1V for both voltages or lower voltage for digital part) 2) Via Low DropOut (LDO) regulator (on-chip, but bypassable)  improve PSRR 3) Via switched capacitor converter (on-chip, but bypassable) (2.5V  1.2V) Effect of switching noise will be investigated by IC

Buck Converters for Pixel Upgrade Katja Klein15Powering - Status and Outlook Katja Klein15 DC-DC converters 2.2m Integration for pixel barrel detector onto supply tube Pseudorapidity  ~ 4  material budget not critical  8 layer bus board and Alu cooling bridges possible! ROC has fast on-chip regulators  insensitive to noise Large distance of converters to pixel modules Sufficient space CO 2 cooling pipes d DC-DC converters required in 2014 (Aachen responsibility!)

Phase-2 Specific Challenges Katja Klein16Powering - Status and Outlook Goals: Deliver large currents with existing cable plant, and save as much copper as possible in cables and mother boards inside the detector volume Conversion ratio as high as possible (Vin < 12V)  potential efficiency issue DC-DC converters to be installed close to detector modules  very little space available, in particular for pT modules  material budget of DC-DC converters is very critical Have to provide up to four different operating voltages (readout chips: Vana = 1.2V & Vdig = 0.9V?, GBT: 1.5V & 2.5V)  find power distribution scheme with maximal benefit for material budget

Phase-2 Specific R&D Topics Katja Klein17Powering - Status and Outlook Understand possible efficiency gain with new ASICs (CERN, Aachen) Explore potential use of switched capacitors within readout chip (IC) Development of power distribution scheme  Requires input from electronics group: chip power consumption, module & tracker strawman, etc.  only paper exercises up to now System tests with new readout chips (first candidate: CBC)  Need access to new readout chips, plus DAQ system etc. Study mechanical and electrical integration of DC-DC buck converters into readout and pT modules or staves  Modularity: how many converters are required per module  Where to put them: on the module or on the support structure, top or back side etc.  How to fix them: separate PCB or part of hybrid etc.  Slow controls  How to cool them  Electro-magnetic interference: coupling to sensor & readout electronics  Study of material budget gain

Readout Modules Katja Klein18Powering - Status and Outlook 2 x 8 CBCs with 256 channels: P = 1.2W or I = 1A (  converter is under-used) Module design basically by Duccio Thermal behaviour and electromagnetic interference to be studied No motherboards foreseen

Stereo Modules Katja Klein19Powering - Status and Outlook 4 x 8 CBCs with 256 channels: P = 2.4W or I = 2A  1 buck converter per module  12 buck converters per rod Thermal behaviour and electromagnetic interference to be studied

Strip-based pT Modules Katja Klein20Powering - Status and Outlook 2 x 8 CBCs with 256 channels: P = 1.2W or I = 1A Could power 2-3 modules from one buck converter  6 bucks per rod 1 GBT per module required  additional DC-DC converters

Pixellated pT Modules Katja Klein21Powering - Status and Outlook 3D approach by Lipton et al. Power estimates range from 3.5W to 10W for 10 x 10 cm 2 module stack DC-DC converters to be integrated onto “beam“  buck converter delivered to FNAL Alternative proposals by Sandro Marchioro and Geoff Hall beam super-module

Summary & Outlook Katja Klein22Powering - Status and Outlook R&D on buck converters makes good progress Focus is currently on phase-1 application  Commitment from Aachen group to develop & produce bucks for phase-1 For phase-2, there are additional requirements which still have to be adressed Switched capacitors are being studied with CBC  very important input for phase-2 Integration of converters into modules or support structures is currently mainly a paper exercise; main obstacles are:  Still too many module concepts  Availability of module and stave prototypes  Man power