May 9, 20012 USB On-The-Go Implementation Trade-offs Zong Liang WU TransDimension Zong Liang WU TransDimension.

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Presentation transcript:

May 9, USB On-The-Go Implementation Trade-offs Zong Liang WU TransDimension Zong Liang WU TransDimension

May 9, Agenda w On-The-Go device vs. Dual role device w Dual role device: top level architecture w Basic issues: system constraints w System constraints vs. Implementation choices w Compliance & interoperability w Product decision w On-The-Go device vs. Dual role device w Dual role device: top level architecture w Basic issues: system constraints w System constraints vs. Implementation choices w Compliance & interoperability w Product decision

May 9, On-The-Go Device Vs. Dual Role Device w Dual role device (DRD): – Supports master negotiation protocol – Acts as master or slave, after MNP – Capable of supplying at least 4mA w On-The-Go device (OTG): – Dual Role Device – Slave-only device drawing less than 4mA from Vbus w Dual role device (DRD): – Supports master negotiation protocol – Acts as master or slave, after MNP – Capable of supplying at least 4mA w On-The-Go device (OTG): – Dual Role Device – Slave-only device drawing less than 4mA from Vbus

May 9, Dual Role Device Top-Level Architecture HOST Function MNP Analog Transceiver Analog Transceiver Processor Interface Processor Interface Registers Top level control Registers Top level control Systemprocessor Cable Charge Pump

May 9, Basic Issues System Constraints w Microprocessors – Wide range of performance (uP itself or the part available for DRD) – Different interfaces: often DRD is not allowed to be system bus master w System software – Latency of HW interrupt processing u Maybe critical for Isochronous applications – Different RTOS w Microprocessors – Wide range of performance (uP itself or the part available for DRD) – Different interfaces: often DRD is not allowed to be system bus master w System software – Latency of HW interrupt processing u Maybe critical for Isochronous applications – Different RTOS

May 9, System Constraints Vs. Implementation Choices w Performance of the master: – Throughput supported: full 12mbits/s (as good as or even better than a PC) vs. Very limited bandwidth – Endpoint types supported: all 4 types vs. A subset – Number of devices and endpoints supported: capable of supporting many devices/endpoints simultaneously vs. Only a few endpoints w Difficulties: – How to get maximum master performance with a limited uP? – How to do in embedded applications where DRD is not allowed to be system bus master ? – How to support Isochronous applications within a RTOS having a large interrupt latency (like wince)? w Performance of the master: – Throughput supported: full 12mbits/s (as good as or even better than a PC) vs. Very limited bandwidth – Endpoint types supported: all 4 types vs. A subset – Number of devices and endpoints supported: capable of supporting many devices/endpoints simultaneously vs. Only a few endpoints w Difficulties: – How to get maximum master performance with a limited uP? – How to do in embedded applications where DRD is not allowed to be system bus master ? – How to support Isochronous applications within a RTOS having a large interrupt latency (like wince)?

May 9, System Constraints Vs. Implementation Choices w uP requirements vs. Master performance: – Desired target for portable or STB applications: 1. Optimal performance 2. Light load on uP 3. Minimum interrupt frequency 4. Loose requirement on uP’s interrupt latency 5. Keep at low cost (HW+SW) – Trade-off vs. Smart SW/HW partitioning Learn from OHCI and UHCI partitioning Ô Call for major architecture innovation w uP requirements vs. Master performance: – Desired target for portable or STB applications: 1. Optimal performance 2. Light load on uP 3. Minimum interrupt frequency 4. Loose requirement on uP’s interrupt latency 5. Keep at low cost (HW+SW) – Trade-off vs. Smart SW/HW partitioning Learn from OHCI and UHCI partitioning Ô Call for major architecture innovation

May 9, System Constraints Vs. Implementation Choices w Many applications: – Portable ( PDA, mobile phone, MP3, pocket PC, digital camera etc ) and less portable ( set-top-box, game machine, etc ): Ô Many RTOS on the market w RTOS-based stack vs. Dedicated system SW – RTOS is not always necessary – Think of a dedicated microprocessor w RTOS-based: how to design once for all? – Try to comply with and reuse OHCI/UHCI stack – Partner with specialty system software house w Many applications: – Portable ( PDA, mobile phone, MP3, pocket PC, digital camera etc ) and less portable ( set-top-box, game machine, etc ): Ô Many RTOS on the market w RTOS-based stack vs. Dedicated system SW – RTOS is not always necessary – Think of a dedicated microprocessor w RTOS-based: how to design once for all? – Try to comply with and reuse OHCI/UHCI stack – Partner with specialty system software house

May 9, System Constraints Vs. Implementation Choices w Power management: – Portable appliances require low power – OTG spec introduces the concept of session and wakeup protocol – Manage power at chip architecture level, by introducing appropriate power management logic w Power management: – Portable appliances require low power – OTG spec introduces the concept of session and wakeup protocol – Manage power at chip architecture level, by introducing appropriate power management logic

May 9, System Constraints Vs. Implementation Choices w Single chip vs. 2-chip solution – OTG master needs to supply (minimum) – Analog transceiver’s signaling is 3.3V – Standard 0.18um process has trouble to implement u Put the charge pump and the analog transceiver into a separate chip u Define a standard interface: ongoing effort w Single chip vs. 2-chip solution – OTG master needs to supply (minimum) – Analog transceiver’s signaling is 3.3V – Standard 0.18um process has trouble to implement u Put the charge pump and the analog transceiver into a separate chip u Define a standard interface: ongoing effort

May 9, Compliance & Interoperability w Compliance to WHAT: – A DRD must be a 100% compliant USB function – OTG master vs. Embedded master vs. Standard PC host (OHCI/UHCI): u OTG: one to one: simpler master u Embedded: Strong sales point if the master can support what a standard PC host can do (endpoint types, number, sizes) w An OTG compliance spec is in development w Compliance to WHAT: – A DRD must be a 100% compliant USB function – OTG master vs. Embedded master vs. Standard PC host (OHCI/UHCI): u OTG: one to one: simpler master u Embedded: Strong sales point if the master can support what a standard PC host can do (endpoint types, number, sizes) w An OTG compliance spec is in development

May 9, Product Decision w What do you really want: 1.Slave-only with mini-connector and draws <=4ma 2.Dual role device (master or slave depending on MNP result) 3.Simultaneous master and slave w Do not forget your expectation on master’s performance w Discrete IC or integrate an IP into your system: – Time to market vs. Cost vs. Risk w What do you really want: 1.Slave-only with mini-connector and draws <=4ma 2.Dual role device (master or slave depending on MNP result) 3.Simultaneous master and slave w Do not forget your expectation on master’s performance w Discrete IC or integrate an IP into your system: – Time to market vs. Cost vs. Risk