ECE 449: Computer Design Lab Coordinator: Kris Gaj TAs: Tuesday session: Pawel Chodowiec Thursday session: Nghi Nguyen.

Slides:

Advertisements

Similar presentations

Digital System Design Subject Name : Digital System Design Course Code : IT-314.

Advertisements

ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2004 Serdar Taşıran.

VHDL - I 1 Digital Systems. 2 «The designer’s guide to VHDL» Peter J. Andersen Morgan Kaufman Publisher Bring laptop with installed Xilinx.

Digital Design with VHDL Presented by: Amir Masoud Gharehbaghi

VHDL Structural Architecture ENG241 Week #5 1. Fall 2012ENG241/Digital Design2 VHDL Design Styles Components and interconnects structural VHDL Design.

ECE 447: Course Organization Instructor:Kris Gaj, S&T II, Room 223 Office hours: T, R 4:30-5:30 PM Lab assistants: Thuy-Tien Nguyen (M)

CSE 378 Computer Hardware Design Prof. Richard E. Haskell – –Tel: –Web site: Follow.

Spring 07, Jan 16 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Introduction Vishwani D. Agrawal James J. Danaher.

Dr. Turki F. Al-Somani VHDL synthesis and simulation – Part 2 Microcomputer Systems Design (Embedded Systems)

Reconfigurable Computing in the Undergraduate Curriculum Jason D. Bakos Dept. of Computer Science and Engineering University of South Carolina.

ECE 448 Lecture 3 Combinational-Circuit Building Blocks Data Flow Modeling of Combinational Logic ECE 448 – FPGA and ASIC Design with VHDL.

George Mason University ECE 448 – FPGA and ASIC Design with VHDL Combinational-Circuit Building Blocks Data Flow Modeling of Combinational Logic ECE 448.

Simple Testbenches Behavioral Modeling of Combinational Logic

ECE 448 FPGA and ASIC Design with VHDL

Digital System Design EEE344 Lecture 1 INTRODUCTION TO THE COURSE

EENG 2910 – Digital Systems Design Fall Course Introduction Class Time: M9:30am-12:20pm Location: B239, B236 and B227 Instructor: Yomi Adamo

Introduction to VHDL By Mr. Fazrul Faiz Zakaria School of Computer and Communication Engineering UniMAP.

ECE 332 Digital Electronics and Logic Design Lab Lab 5 VHDL Design Styles Testbenches.

VHDL Structured Logic Design School of Electrical Engineering University of Belgrade Department of Computer Engineering Ivan Dugic Veljko.

ECE 448 FPGA and ASIC Design with VHDL Spring 2008.

Data Flow Modeling of Combinational Logic Simple Testbenches

ECE 448 FPGA and ASIC Design with VHDL

Labs Practicing in Design of Combinational Networks and FSM with Concurrent Error Detection Tatjana Stanković, Goran Djordjević, Mile Stojčev 2075 Microprocessor.

Ch.9 CPLD/FPGA Design TAIST ICTES Program VLSI Design Methodology Hiroaki Kunieda Tokyo Institute of Technology.

Studio Session 1: Introduction to VHDL and related Tools EE19D – 25/01/2005.

Follow-up Courses. ECE Department MS in Electrical Engineering MS EE MS in Computer Engineering MS CpE COMMUNICATIONS & NETWORKING SIGNAL PROCESSING CONTROL.

EL 3101 EL310 Hardware Description Languages Spring 2015 Instructor: Ilker Hamzaoglu Teaching Assistant: Ercan Kalalı Web Site:

CprE / ComS 583 Reconfigurable Computing Prof. Joseph Zambreno Department of Electrical and Computer Engineering Iowa State University Lecture #17 – Introduction.

1 H ardware D escription L anguages Modeling Digital Systems.

ECE 448 FPGA and ASIC Design with VHDL Spring 2010.

Welcome to the ECE 449 Computer Design Lab Spring 2005.

George Mason University ECE 448 – FPGA and ASIC Design with VHDL ASICs vs. FPGAs ECE 448 Lecture 15.

1 ECE 545 – Introduction to VHDL Dataflow Modeling of Combinational Logic Simple Testbenches ECE 656. Lecture 2.

Fall 2004EE 3563 Digital Systems Design EE 3563 VHSIC Hardware Description Language  Required Reading: –These Slides –VHDL Tutorial  Very High Speed.

George Mason University ECE 449 – Computer Design Lab Welcome to the ECE 449 Computer Design Lab Spring 2005.

ECE 448 FPGA and ASIC Design with VHDL Spring 2011.

George Mason University ECE 449 – Computer Design Lab Welcome to the ECE 449 Computer Design Lab Spring 2004.

Electrical and Computer Engineering University of Cyprus LAB 1: VHDL.

Introduction to VLSI Design – Lec01. Chapter 1 Introduction to VLSI Design Lecture # 11 High Desecration Language- Based Design.

ECE 332 Digital Electronics and Logic Design Lab Lab 6 Concurrent Statements & Adders.

1 Hardware Description Languages: a Comparison of AHPL and VHDL By Tamas Kasza AHPL&VHDL Digital System Design 1 (ECE 5571) Spring 2003 A presentation.

George Mason University Simple Testbenches ECE 545 Lecture 4.

George Mason University Behavioral Modeling of Sequential-Circuit Building Blocks ECE 545 Lecture 6 Mixing Design Styles.

ECE 448 FPGA and ASIC Design with VHDL

VHDL – Behavioral Modeling and Registered Elements ENGIN 341 – Advanced Digital Design University of Massachusetts Boston Department of Engineering Dr.

George Mason University Data Flow Modeling in VHDL ECE 545 Lecture 7.

George Mason University Follow-up Courses. ECE Department MS in Electrical Engineering MS EE MS in Computer Engineering MS CpE COMMUNICATIONS & NETWORKING.

ECE 447: Lecture 16 Common Errors & Good Programming Style.

EE121 John Wakerly Lecture #17

ECE 332 Digital Electronics and Logic Design Lab Lab 5 VHDL Design Styles Testbenches Concurrent Statements & Adders.

Data Flow Modeling in VHDL

George Mason University ECE 448 – FPGA and ASIC Design with VHDL VHDL Coding for Synthesis ECE 448 Lecture 12.

CSE 378 Computer Hardware Design (Formerly, Design of Digital Systems) Prof. Richard E. Haskell – –Tel: –Web site:

Digital Design Using VHDL and PLDs ECOM 4311 Digital System Design Chapter 1.

ECE 448 FPGA and ASIC Design with VHDL

ECE 448 FPGA and ASIC Design with VHDL Spring 2009.

George Mason University Behavioral Modeling of Sequential-Circuit Building Blocks ECE 545 Lecture 8.

Course web page: ECE 545 Introduction to VHDL ECE web page  Courses  Course web pages  ECE 545.

George Mason University Data Flow Modeling of Combinational Logic ECE 545 Lecture 5.

ECE 448 – FPGA and ASIC Design with VHDL George Mason University ECE 448 Lab 2 Implementing Combinational Logic in VHDL.

Design methodology for Implementing a Microcontroller in a FPGA. Phillip Southard Ohio University EE 690 Reconfigurable Design.

SUBJECT : DIGITAL ELECTRONICS CLASS : SEM 3(B) TOPIC : INTRODUCTION OF VHDL.

Programmable Logic Devices

Implementing Combinational

ECE 4110–5110 Digital System Design

VHDL Introduction.

Implementing Combinational

Modeling of Circuits with a Regular Structure

Digital Designs – What does it take

Presentation transcript:

ECE 449: Computer Design Lab Coordinator: Kris Gaj TAs: Tuesday session: Pawel Chodowiec Thursday session: Nghi Nguyen

Tasks of the course Advanced course on digital system design with VHDL Introduction to FPGA technology Testing equipment - writing VHDL code for synthesis - RTL VHDL - state machines - test benches - hardware: Xilinx FPGAs - software: Aldec simulator Xilinx ISE - oscilloscope - logic analyzer

Subset of VHDL used in ECE 449 VHDL model behavioral structural data flowalgorithmic Registers State machines Test benches Required Not required Concurrent statementsSequential statements

Structural VHDL component instantiation (port map) component instantiation with generic (generic map, port map) generate scheme for component instantiations (for-generate) Major instructions

Data-flow VHDL concurrent signal assignment (  ) conditional concurrent signal assignment (when-else) selected concurrent signal assignment (with-select-when) generate scheme for equations (for-generate) Major instructions Concurrent statements

Algorithmic VHDL (subset) process statement (process) sequential signal assignment (  ) Major instructions Sequential statements General Registers if-then-else statement State machines case-when statement Testbenches loops (for-loop, while-loop)

Digital system design technologies Microprocessors ASICs FPGAs ECE 445 ECE 442 ECE 447 ECE 586 ECE 680 ECE 681 ECE 645 ECE 681 ECE 645 ECE 449 ECE 511 ECE 611 ECE 431 Computer Organization Digital Computer Design & Interfacing Single Chip Microcomputers Computer Design Lab Digital Circuit Design Microprocessors Advanced Microprocessors VLSI Design Automation Computer Arithmetic Digital Integrated Circuits Physical VLSI Design

FPGAs vs. ASICs ASICs FPGAs High performance Off-the-shelf Short time to the market Low development costs Reconfigurability Low power Low cost (but only in high volumes)