Elements of Computing Systems, Nisan & Schocken, MIT Press, www.nand2tetris.org, Chapter 2: Boolean Arithmetic slide 1www.nand2tetris.org Building a Modern.

Slides:



Advertisements
Similar presentations
Chapter 4: Machine Language
Advertisements

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 1: Boolean Logic slide 1www.idc.ac.il/tecs Chapter 1: Boolean.
ADDER, HALF ADDER & FULL ADDER
EET 1131 Unit 7 Arithmetic Operations and Circuits
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 5: Computer Architecture slide 1www.idc.ac.il/tecs Chapter.
Section 10.3 Logic Gates.
Computer ArchitectureFall 2008 © August 25, CS 447 – Computer Architecture Lecture 3 Computer Arithmetic (1)
Homework Reading Machine Projects Labs
Combinational Logic1 DIGITAL LOGIC DESIGN by Dr. Fenghui Yao Tennessee State University Department of Computer Science Nashville, TN.
IT Systems Number Operations EN230-1 Justin Champion C208 –
Computer ArchitectureFall 2007 © August 29, 2007 Karem Sakallah CS 447 – Computer Architecture.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 3: Sequential Logic slide 1www.idc.ac.il/tecs Chapter 3:
Number Systems Lecture 02.
©2008 The McGraw-Hill Companies, Inc. All rights reserved. Digital Electronics Principles & Applications Seventh Edition Chapter 10 Arithmetic Circuits.
CS 105 Digital Logic Design
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Introduction: Hello, World Below slide 1www.idc.ac.il/tecs Introduction:
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 10: Compiler I: Syntax Analysis slide 1www.idc.ac.il/tecs.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 2: Boolean Logic slide 1www.idc.ac.il/tecs Chapter 2: Boolean.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 10: Compiler I: Syntax Analysis slide 1www.idc.ac.il/tecs Compiler.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 7: Virtual Machine I: Stack Arithmetic slide 1www.nand2tetris.org.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 4: Machine Language slide 1www.idc.ac.il/tecs Machine Language.
CS 1308 – Computer Literacy and the Internet. It’s Not Magic  The goal of the next series of lectures is to show you exactly how a computer works. 
1 Modified from  Modified from 1998 Morgan Kaufmann Publishers Chapter Three: Arithmetic for Computers citation and following credit line is included:
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Logic Circuits I.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 6: Assembler slide 1www.idc.ac.il/tecs Assembler Elements of Computing.
CS1Q Computer Systems Lecture 9 Simon Gay. Lecture 9CS1Q Computer Systems - Simon Gay2 Addition We want to be able to do arithmetic on computers and therefore.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 5: Computer Architecture slide 1www.idc.ac.il/tecs Computer Architecture.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 5: Computer Architecture slide 1www.nand2tetris.org Building a.
ADDERS Half Adders Recall that the basic rules of binary addition are as indicated below in Table 2-9. A circuit known as the half-adder carries out these.
1 CMSC 250 Chapter 1, con't., Combinatorial circuits.
Chapter 4 – Arithmetic Functions and HDLs Logic and Computer Design Fundamentals.
Topic: Arithmetic Circuits Course: Digital Systems Slide no. 1 Chapter # 5: Arithmetic Circuits.
Digital Computer Concept and Practice Copyright ©2012 by Jaejin Lee Logic Circuits I.
Lec 13Systems Architecture1 Systems Architecture Lecture 13: Integer Multiplication and Division Jeremy R. Johnson Anatole D. Ruslanov William M. Mongan.
CSE 241 Computer Organization Lecture # 9 Ch. 4 Computer Arithmetic Dr. Tamer Samy Gaafar Dept. of Computer & Systems Engineering.
Building a Modern Computer From First Principles
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, Chapter 11: Compiler II: Code Generation slide 1www.idc.ac.il/tecs.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 1: Boolean Logic slide 1www.nand2tetris.org Building a Modern.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 1: Boolean Logic slide 1www.idc.ac.il/tecs Boolean Logic Elements.
Instructor: Alexander Stoytchev CprE 281: Digital Logic.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 11: Compiler II: Code Generation slide 1www.nand2tetris.org Building.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 3: Sequential Logic slide 1www.idc.ac.il/tecs Sequential Logic.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 3: Sequential Logic slide 1www.nand2tetris.org Building a Modern.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 10: Compiler I: Syntax Analysis slide 1www.nand2tetris.org Building.
Arithmetic Logic Unit (ALU) Anna Kurek CS 147 Spring 2008.
4. Computer Maths and Logic 4.2 Boolean Logic Logic Circuits.
1 CS 151: Digital Design Chapter 4: Arithmetic Functions and Circuits 4-1,2: Iterative Combinational Circuits and Binary Adders.
Universal college of engineering & technology. .By Harsh Patel)
Building a Modern Computer From First Principles
CS 1308 – Computer Literacy and the Internet Building the CPU.
Arithmetic Operations
Logic Design CS221 1 st Term combinational circuits Cairo University Faculty of Computers and Information.
Addition, Subtraction, Logic Operations and ALU Design
1 ECE 545—Digital System Design with VHDL Lecture 1 Digital Logic Refresher Part A – Combinational Logic Building Blocks.
Negative binary numbers 1 Computer Architectures M.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 6: Assembler slide 1www.nand2tetris.org Building a Modern Computer.
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 4: Machine Language slide 1www.nand2tetris.org Building a Modern.
Arithmetic Logic Unit (ALU) Introduction to Computer Yung-Yu Chuang with slides by Sedgewick & Wayne ( introcs.cs.princeton.edu ), Nisan & Schocken (
Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 4: Machine Language slide 1www.nand2tetris.org Building a Modern.
MicroProcessors Lec. 4 Dr. Tamer Samy Gaafar. Course Web Page —
1 EGR 277 – Digital Logic Syllabus Office Hours No food or drinks in the classrooms Web page (demonstration) Lecture #1 EGR 277 – Digital Logic Reading.
CS151 Introduction to Digital Design Chapter 4: Arithmetic Functions and HDLs 4-1: Iterative Combinational Circuits 4-2: Binary Adders 1Created by: Ms.Amany.
Gunjeet Kaur Dronacharya Group of Institutions. Binary Adder-Subtractor A combinational circuit that performs the addition of two bits is called a half.
Chapter 12. Chapter Summary Boolean Functions Representing Boolean Functions Logic Gates Minimization of Circuits (not currently included in overheads)
Homework Reading Machine Projects Labs
Reference: Moris Mano 4th Edition Chapter 4
William Stallings Computer Organization and Architecture 7th Edition
Compiler I: Sytnax Analysis
Homework Reading Machine Projects Labs
Presentation transcript:

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 1www.nand2tetris.org Building a Modern Computer From First Principles Boolean Arithmetic

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 2www.nand2tetris.org Usage and Copyright Notice: Copyright © Noam Nisan and Shimon Schocken This presentation contains lecture materials that accompany the textbook “The Elements of Computing Systems” by Noam Nisan & Shimon Schocken, MIT Press, We provide both PPT and PDF versions. Our web site, a set of presentations, one for each book chapter. Each presentation is designed to support about 3 hours of classroom or self-study instruction. You are welcome to use or edit this presentation as you see fit for instructional and non- commercial purposes. If you use our materials, please include a reference to If you have any questions or comments, please write us at

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 3www.nand2tetris.org Counting systems quantity decimal binary 3-bit register         overflow  overflow  overflow

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 4www.nand2tetris.org Rationale

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 5www.nand2tetris.org no overflowoverflow Algorithm: exactly the same as in decimal addition Overflow (MSB carry) has to be dealt with. Binary addition Assuming a 4-bit system:

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 6www.nand2tetris.org Representing negative numbers (4-bit system) The codes of all positive numbers begin with a “0” The codes of all negative numbers begin with a “1“ To convert a number: leave all trailing 0’s and first 1 intact, and flip all the remaining bits Example: = 2 + (-5) = = -3

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 7www.nand2tetris.org Building an Adder chip Adder: a chip designed to add two integers Proposed implementation: Half adder: designed to add 2 bits Full adder: designed to add 3 bits Adder: designed to add two n-bit numbers.

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 8www.nand2tetris.org Half adder (designed to add 2 bits) Implementation: based on two gates that you’ve seen before. ab sum carry

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 9www.nand2tetris.org Full adder (designed to add 3 bits) Implementation: can be based on half-adder gates. abcsum carry

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 10www.nand2tetris.org n-bit Adder (designed to add two 16-bit numbers) Implementation: array of full-adder gates a … b … out +

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 11www.nand2tetris.org The ALU (of the Hack platform) out(x, y, control bits ) = x+y, x-y, y–x, 0, 1, -1, x, y, -x, -y, x!, y!, x+1, y+1, x-1, y-1, x&y, x|y

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 12www.nand2tetris.org ALU logic (Hack platform) Implementation: build a logic gate architecture that “executes” the control bit “instructions”: if zx==1 then set x to 0 (bit-wise), etc.

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 13www.nand2tetris.org The ALU in the CPU context (a sneak preview of the Hack platform) ALU Mux D out A/M a D register A register A M c1,c2, …,c6 RAM (selected register)

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 14www.nand2tetris.org Perspective Combinational logic Our adder design is very basic: no parallelism It pays to optimize adders Our ALU is also very basic: no multiplication, no division Where is the seat of more advanced math operations? a typical hardware/software tradeoff.

Elements of Computing Systems, Nisan & Schocken, MIT Press, Chapter 2: Boolean Arithmetic slide 15www.nand2tetris.org Historical end-note: Leibnitz ( ) “The binary system may be used in place of the decimal system; express all numbers by unity and by nothing” 1679: built a mechanical calculator (+, -, *, /) CHALLENGE: “All who are occupied with the reading or writing of scientific literature have assuredly very often felt the want of a common scientific language, and regretted the great loss of time and trouble caused by the multiplicity of languages employed in scientific literature: SOLUTION: “Characteristica Universalis”: a universal, formal, and decidable language of reasoning The dream’s end: Turing and Gödel in 1930’s. Leibniz’s medallion for the Duke of Brunswick