Error-Correction &Crosstalk Avoidance in DSM Busses Ketan Patel and Igor Markov University of Michigan Electrical Engineering & Computer Science 2003 ACM /03/0004

Outline Motivation Memoryless Codes Codes with memory Boundary shift codes

Motivation DSM busses increasingly susceptible to noise Crosstalk Electromagnetic interference Power grid fluctuations Goal: Avoid crosstalk & provide error-correction

Crosstalk Noise The severity of interference is correlated with the particular switching patterns on the bus. Bus value (t=0) ⇒ Bus value (t=1) ⇒ We call this an invalid transition A self-shielding code does not allow invalid transitions.

Memoryless Model Vertices: Bus Values Edges: Valid Transitions Max clique ⇒ Optimal memoryless code distance ≥ d ⇒ Detect d-1 errors can correct [(d-1)/2] errors Place edges if Valid transition Distance large enough 3-bit codes example (a) (b)

Codes with Memory Two graphs: G1 :crosstalk constraints G2 :error-correction constraints For rate log2M code Vertices connected to ≥ M vertices in G1 forming clique in G2

Dependent Boundaries Dependent boundary: boundary with transition Positions {1, 3, 4, 5} No overlapping dependent boundaries ⇒ No invalid transition

Boundary Shift Codes Start with error-correcting code Duplicate all bits (no odd dependent boundaries) Possibly “puncture” last bit position ⇒ Code 1 1-bit circular right-shift ⇒ Code 2 Code 1 has no odd dependent boundaries Code 2 has no even dependent boundaries

Boundary Shift Codes(example) Time Input Encoded Output Time Received bit left-shift ⇒ Decode by majority vote ⇒ 0111

Advantages Practical encoder/decoder Scalable construction Systematic (unencoded wires) Drawbacks Encoding/decoding logic overhead Wire overhead

Code Rates