FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR IC Fabrication n Basic fabrication steps. n Transistor structures. n VLSI Characteristics.

Slides:

Advertisements

Similar presentations

CMOS Fabrication EMT 251.

Advertisements

Simplified Example of a LOCOS Fabrication Process

VLSI Design Lecture 2: Basic Fabrication Steps and Layout

Lecture 11: MOS Transistor

CSCE 612: VLSI System Design Instructor: Jason D. Bakos.

Introduction to CMOS VLSI Design Lecture 0: Introduction

Design and Implementation of VLSI Systems (EN1600) lecture04 Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Sedra/Prentice.

Modern VLSI Design 2e: Chapter 2 Copyright  1998 Prentice Hall PTR Topics n Basic fabrication steps n Transistor structures n Basic transistor behavior.

Elettronica D. AA Digital Integrated Circuits© Prentice Hall 1995 Manufacturing Process CMOS Manufacturing Process.

Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007 [sources: Sedra/Prentice Hall, Saint/McGrawHill,

Lecture #51 Lecture #5 – VLSI Design Review zPhotolithography zPatterning Silicon zProcess steps used are: yStarts with Si wafer yThermal oxidation yPhotoresist.

Lecture 0: Introduction. CMOS VLSI Design 4th Ed. 0: Introduction2 Introduction  Integrated circuits: many transistors on one chip.  Very Large Scale.

Modern VLSI Design 3e: Chapter 2 Copyright  1998, 2002 Prentice Hall PTR Topics n Basic fabrication steps. n Transistor structures. n Basic transistor.

Device Fabrication Example

Introduction Integrated circuits: many transistors on one chip.

EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process I Dr. Shiyan Hu Office: EERC 518 Adapted and modified from Digital Integrated.

ISAT 436 Micro-/Nanofabrication and Applications MOS Transistor Fabrication David J. Lawrence Spring 2001.

Z. Feng VLSI Design 1.1 VLSI Design MOSFET Zhuo Feng.

1 VLSI Fabrication Technology. Microelectronic Circuits - Fifth Edition Sedra/Smith2 Copyright  2004 by Oxford University Press, Inc. Figure A.1 Silicon.

CS/EE 6710 CMOS Processing. N-type Transistor + - i electrons Vds +Vgs S G D.

２． Transistors and Layout Fabrication techniques Transistors and wires Design rule for layout Basic concepts and tools for Layout.

VLSI Design Lecture 2: Basic Fabrication Steps and Layout Mohammad Arjomand CE Department Sharif Univ. of Tech. Adapted with modifications from Harris’s.

VLSI, Lecture 1 A review of microelectronics and an introduction to MOS technology Department of Computer Engineering, Prince of Songkla.

Modern VLSI Design 4e: Chapter 2 Copyright  2009 Prentice Hall PTR Topics n Basic fabrication steps. n Transistor structures. n Basic transistor behavior.

Lecture 0: Introduction. CMOS VLSI Design 4th Ed. 0: Introduction2 Introduction  Integrated circuits: many transistors on one chip.  Very Large Scale.

1. A clean single crystal silicon (Si) wafer which is doped n-type (ColumnV elements of the periodic table). MOS devices are typically fabricated on a,

Chapter 4 Overview of Wafer Fabrication

Modern VLSI Design 3e: Chapter 2 Copyright  1998, 2002 Prentice Hall PTR Topics n Design rules and fabrication. n SCMOS scalable design rules. n Stick.

Modern VLSI Design 3e: Chapter 2 Partly from 2002 Prentice Hall PTR week2-1 Lecture 4 Transistor as Switch Jan

Semiconductor Manufacturing Technology Michael Quirk & Julian Serda © October 2001 by Prentice Hall Chapter 9 IC Fabrication Process Overview.

EE141 © Digital Integrated Circuits 2nd Manufacturing 1 Manufacturing Process Dr. Shiyan Hu Office: EERC 731 Adapted and modified from Digital Integrated.

Introduction to CMOS VLSI Design CMOS Fabrication and Layout Harris, 2004 Updated by Li Chen, 2010.

Modern VLSI Design 3e: Chapter 2Partly from 2002 Prentice Hall PTR week4-1 Lecture 10 Wire and Via Jan. 27, 2003.

ISAT 436 Micro-/Nanofabrication and Applications Thermal Oxidation David J. Lawrence Spring 2004.

Modern VLSI Design 3e: Chapter 2 Copyright  1998, 2002 Prentice Hall PTR Topics n Wire and via structures. n Wire parasitics. n Transistor parasitics.

Spencer/Ghausi, Introduction to Electronic Circuit Design, 1e, ©2003, Pearson Education, Inc. Chapter 3, slide 1 Introduction to Electronic Circuit Design.

CMOS Fabrication nMOS pMOS.

VLSI Design Lecture 3: Parasitics of CMOS Wires Mohammad Arjomand CE Department Sharif Univ. of Tech. Adapted with modifications from Harris’s lecture.

Topics Basic fabrication steps. Transistor structures.

IC Fabrication/Process

NMOS FABRICATION 1. Processing is carried out on a thin wafer cut from a single crystal of silicon of high purity into which the required p-impurities.

CORPORATE INSTITUTE OF SCIENCE & TECHNOLOGY, BHOPAL DEPARTMENT OF ELECTRONICS & COMMUNICATIONS NMOS FABRICATION PROCESS - PROF. RAKESH K. JHA.

©2008 R. Gupta, UCSD COSMOS Summer 2008 Chips and Chip Making Rajesh K. Gupta Computer Science and Engineering University of California, San Diego.

Modern VLSI Design 2e: Chapter 2 Copyright  1998 Prentice Hall PTR Topics n Basic fabrication steps n Transistor structures n Basic transistor behavior.

1 Overview of Fabrication Processes of MOSFETs and Layout Design Rules.

Dynamic Behavior of MOS Transistor. The Gate Capacitance t ox n + n + Cross section L Gate oxide x d x d L d Polysilicon gate Top view Gate-bulk overlap.

Modern VLSI Design 3e: Chapter 2Partly from 2002 Prentice Hall PTR week3-1 Lectures 6, 7 and 8 Transistor Function Jan. 17, 20 and 22, 2003.

CMOS VLSI Design Introduction

Norhayati Soin 05 KEEE 4425 WEEK 7/1 23/8/2005 LECTURE 9: KEEE 4425 WEEK 7 CMOS LAYOUT AND STICK DIAGRAM (Cont’d)

CMOS VLSI Fabrication.

Silicon Design Page 1 The Creation of a New Computer Chip.

CMOS FABRICATION.

CMOS Fabrication EMT 251.

Introduction to CMOS VLSI Design Lecture 0: Introduction.

Basic Planar Processes

CMOS Fabrication CMOS transistors are fabricated on silicon wafer

Subject Name: Fundamentals Of CMOS VLSI Subject Code: 10EC56

Manufacturing Process I

Layout and fabrication of CMOS circuits

Topics Basic fabrication steps. Transistor structures.

VLSI System Design LEC3.1 CMOS FABRICATION REVIEW

Silicon Wafer cm (5’’- 8’’) mm

Add nitride Silicon Substrate.

CMOS半導體製程概念 INVERTER.

Manufacturing Process I

Manufacturing Process I

Presentation transcript:

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR IC Fabrication n Basic fabrication steps. n Transistor structures. n VLSI Characteristics –Basic transistor behavior. »Transconductances( 超傳導 ) –Latch up.

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR VLSI Technology n VLSI Photolithography –Mask patterns are put on wafer using photo- sensitive material n IC built on silicon substrate( 基質 ) –some structures diffused into substrate; – other structures built on top of substrate

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Fabrication processes n Step 1: –Substrate regions are doped with n-type and p-type impurities. – (n+ = heavily doped) n Step 2: –Wires made of polycrystalline silicon ( 多矽晶體 ) (poly) n Step 3: –Multiple layers of aluminum/copper (metal). n Step4: –Silicon dioxide (SiO 2 ) is insulator( 絕緣體 ).

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process step 1 First place tubs to provide properly-doped substrate for n-type, p-type transistors: p-tubn-tub substrate

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process step 2-1 Pattern polysilicon before diffusion regions: p-tubn-tub poly gate oxide

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 2-2 Add diffusions, performing self-masking: p-tubn-tub poly n+ p+

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 3 Start adding metal layers: p-tubn-tub poly n+ p+ metal 1 vias

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Process steps 4 n Polish SiO 2 before adding metal 2: p-tub poly n+ p+ metal 1 vias metal 2

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Cross Section of Simple IC substrate n+ p+ substrate metal1 poly SiO 2 metal2 metal3 transistor via

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Transistor structure n-type transistor:

FPGA-Based System Design: Chapter 2 Copyright  2004 Prentice Hall PTR Transistor layout n-type (tubs may vary): w L