1 EECS 373 Design of Microprocessor-Based Systems Prabal Dutta University of Michigan Lecture 2: Architecture, Assembly, and ABI September 9, 2010

2 Announcements Q&A website for class discussion – –Good for discussion outside of class –Strongly encourage you to log issues there Actel Eval Boards –Yes, you keep them for the term! –This is an experiment to see what you do with them –Enables students to explore ideas, labs, etc outside class –Encourage you to install tool chain and try out Actel tutorials Will drop lowest minute quiz (only one)

3 Recap of the last lecture What distinguishes embedded systems? –Application-specific –Resource-constrained –Real-time operations –Software runs “forever” Technology scaling is driving “embedded everywhere” –Microprocessors –Memory (RAM and Flash) –Imagers and MEMS sensors –Energy storage Embedded platforms and software –How does a phone boot? HW, SW, INT, and drivers –What are the components of a DSL modem? 18 major parts –Why the ARM architecture? 90%+ of 32-bit embedded CPUs –How do ARM licensees differentiate products? Peripherals

4 Architecture

5 In the context of computers, what does architecture mean?

6 Architecture has many meanings Computer Organization (or Microarchitecture) –Control and data paths –I/D pipeline design –Cache design –…–… System Design (or Platform Architecture) –Memory and I/O buses –Memory controllers –Direct memory access –…–… Instruction Set Architecture (ISA)

7 What is an Instruction Set Architecture (ISA)?

8 An ISA defines the hardware/software interface A “contract” between architects and programmers Instruction set Register set Memory and addressing modes Word sizes Data formats Operating modes Condition codes Calling conventions

ARM Architecture roadmap 9

10 ARM Cortex-M3 ISA Register SetAddress Space Branching Data processing Load/Store Exceptions Miscellaneous Instruction Set 32-bits Endianess

11 Mode dependent Registers

12 Address Space

13 Instruction Encoding ADD immediate

14 Branch

15 Data processing instructions Many, Many More!

16 Load/Store instructions

17 Miscellaneous instructions

Addressing Modes Offset Addressing –Offset is added or subtracted from base register –Result used as effective address for memory access –[, ] Pre-indexed Addressing –Offset is applied to base register –Result used as effective address for memory access –Result written back into base register –[, ]! Post-indexed Addressing –The address from the base register is used as the EA –The offset is applied to the base and then written back –[ ],

options An immediate constant –#10 An index register – A shifted index register –, LSL #

Application Program Status Register (APSR)

Updating the APSR SUB Rx, Ry –Rx = Rx - Ry –APSR unchanged SUBS –Rx = Rx - Ry –APSR N or Z bits might be set ADD Rx, Ry –Rx = Rx + Ry –APSR unchanged ADDS –Rx = Rx + Ry –APSR C or V bits might be set

Conditional execution: Append to many instructions for conditional execution

23 The ARM architecture “books” for this class

24 The ARM software tools “books” for this class

25.equSTACK_TOP, 0x text.syntaxunified.thumb.global_start.typestart, %function _start:.wordSTACK_TOP, start start: movs r0, #10 movs r1, #0 loop: adds r1, r0 subs r0, #1 bne loop deadloop: b deadloop.end An ARM assembly language program for GNU

26 all: arm-none-eabi-as -mcpu=cortex-m3 -mthumb example1.s -o example1.o arm-none-eabi-ld -Ttext 0x0 -o example1.out example1.o arm-none-eabi-objcopy -Obinary example1.out example.bin arm-none-eabi-objdump -S example1.out > example1.list A simple Makefile

27.equSTACK_TOP, 0x text.syntaxunified.thumb.global_start.typestart, %function _start:.wordSTACK_TOP, start start: movs r0, #10 movs r1, #0 loop: adds r1, r0 subs r0, #1 bne loop deadloop: b deadloop.end An ARM assembly language program for GNU

28 example1.out: file format elf32-littlearm Disassembly of section.text: : 0: word0x : word0x : 8:200a movsr0, #10 a:2100 movsr1, # c : c:1809 addsr1, r1, r0 e:3801 subsr0, #1 10:d1fc bne.nc : 12:e7fe b.n12 Disassembled object code

29 Questions? Comments? Discussion?