SOC Design Lecture 9 SRAM vs. NOR Flash. Taehyun Kim & Youpyo Hong, DGU SRAM vs. NOR Flash There are asynchronous SRAM and synchronous SRAM. Our SRAM.

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Presentation transcript:

SOC Design Lecture 9 SRAM vs. NOR Flash

Taehyun Kim & Youpyo Hong, DGU SRAM vs. NOR Flash There are asynchronous SRAM and synchronous SRAM. Our SRAM controller is for synchronous SRAM. Read/Write occurs on edges on clock signal. NOR Flash is asynchronous. Read/Write occurs on control and address signal transitions. You have a synchronous SRAM controller. How to control NOR flash using sync. SRAM controller?

Taehyun Kim & Youpyo Hong, DGU How to control asynchronous memory? Control and address signals transition on edges on clock signal. So, sync. controller can handle asynchronous memory.

Taehyun Kim & Youpyo Hong, DGU Read SRAM and NOR flash are same. SRAMNOR

Taehyun Kim & Youpyo Hong, DGU Write NOR write is SRAM write plus alpha. NOR Flash needs “Command” before input address and data. SRAMNOR

Taehyun Kim & Youpyo Hong, DGU NOR Flash Commands You can find this info. from distributed datasheet page 10.

Taehyun Kim & Youpyo Hong, DGU Write with Command Write is done. To read data just written, care must be taken.

Taehyun Kim & Youpyo Hong, DGU Wait Time To complete write operation, NOR flash needs some time. Write(Program) Wait Time is described in the datasheet page 18.

Taehyun Kim & Youpyo Hong, DGU Write Issue Typically, a memory cell of NOR can be changed to 0 from 1 but not vice versa. For example, if data was 1010 and you try to write 0101 to the same position the result is In such case, NOR flash needs initialization.

Taehyun Kim & Youpyo Hong, DGU Erase In NOR Flash, initialization is called “Erase”. NOR Flash has two erase modes. We use simple “Chip Erase”.

Taehyun Kim & Youpyo Hong, DGU Chip Erase Chip erase is similar to write but it has more commands. Chip erase has wait time, too.