ANALOG ELECTRONIC CIRCUITS 1 EKT 204 Basic BJT Amplifiers (Part 2)

Basic Common-Emitter Amplifier The basic common-emitter circuit used in previous analysis causes a serious defect : If BJT with VBE=0.7 V is used, IB=9.5 μA & IC=0.95 mA But, if new BJT with VBE=0.6 V is used, IB=26 μA & BJT goes into saturation; which is not acceptable  Previous circuit is not practical So, the emitter resistor is included: Q-point is stabilized against variations in β, as will the voltage gain, AV Assumptions CC acts as a short circuit Early voltage = ∞ ==> ro neglected due to open circuit

Common-Emitter Amplifier with Emitter Resistor inside transistor CE amplifier with emitter resistor Small-signal equivalent circuit (with current gain parameter, β)

Common-Emitter Amplifier with Emitter Resistor ac output voltage Input voltage loop Input resistance, Rib Input resistance to amplifier, Ri Voltage divider equation of Vin to Vs Remember: Assume VA is infinite,  ro is neglected

Common-Emitter Amplifier with Emitter Resistor Cont.. So, small-signal voltage gain, AV If Ri >> Rs and (1 + β)RE >> rπ Remember: Assume VA is infinite,  ro is neglected

Common-Emitter Amplifier with Emitter Bypass Capacitor RS R1 R2 RE RC vs vO CC VCC CE Emitter bypass capacitor, CE provides a short circuit to ground for the ac signals Emitter bypass capacitor is used to short out a portion or all of emitter resistance by the ac signal. Hence no RE appear in the hybrid-π equivalent circuit Vo Vs RC RS r ro R1|| R2 gmV Small-signal hybrid-π equivalent circuit

DC & AC LOAD LINE ANALYSIS DC load line Visualized the relationship between Q-point & transistor characteristics AC load line Visualized the relationship between small-signal response & transistor characteristics Occurs when capacitors added in transistor circuit

Common Emitter Amplifier with emitter bypass capacitor Example 1 Common-emitter amplifier with emitter bypass capacitor

DC Load Line Solution... KVL on C-E loop

AC Load Line Solution... KVL on C-E loop AC equivalent circuit

DC & AC Load Lines Full solution

AC LOAD LINE ANALYSIS Determine the dc and ac load line. VBE=0.7V, β=150, VA=∞ Example 2

DC Load Line To determine dc Q-point, KVL around B-E loop

AC Load Line Small signal hybrid-π equivalent circuit

DC & AC Load lines Full solution

Maximum Symmetrical Swing When symmetrical sinusoidal signal applied to the input of an amplifier, the output generated is also a symmetrical sinusoidal signal AC load line is used to determine maximum output symmetrical swing If output is out of limit, portion of the output signal will be clipped & signal distortion will occur

Maximum Symmetrical Swing Steps to design a BJT amplifier for maximum symmetrical swing: Write DC load line equation (relates of ICQ & VCEQ) Write AC load line equation (relates ic, vce ; vce = - icReq, Req = effective ac resistance in C-E circuit) Generally, ic = ICQ – IC(min), where IC(min) = 0 or some other specified min collector current Generally, vce = VCEQ – VCE(min), where VCE(min) is some specified min C-E voltage Combination of the above equations produce optimum ICQ & VCEQ values to obtain maximum symmetrical swing in output signal

Maximum Symmetrical Swing Example 3 Determine the maximum symmetrical swing in the output voltage of the circuit given in Example 2. Solution: From the dc & ac load line, the maximum negative swing in the Ic is from 0.894 mA to zero (ICQ). So, the maximum possible peak-to-peak ac collector current: The max. symmetrical peak-to-peak output voltage: Maximum instantaneous collector current:

Self-Reading Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007 Chapter 6: Basic BJT Amplifiers Page: 397-413, 415-424.

Exercise Textbook: Donald A. Neamen, ‘MICROELECTRONICS Circuit Analysis & Design’,3rd Edition’, McGraw Hill International Edition, 2007 Exercise 6.5, 6.6, 6.7,6.9 Exercise 6.10 , 6.11