1 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) CPRE 583 Reconfigurable Computing Lecture 7: Wed 10/28/2009 (Compute Models) Instructor: Dr. Phillip Jones Reconfigurable Computing Laboratory Iowa State University Ames, Iowa, USA

2 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Class Projects Common Compute Models Overview

3 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Project Grading Breakdown 60% Final Project Demo 30% Final Project Report –30% of your project report grade will come from your 5 project updates. Friday’s midnight 10% Final Project Presentation

4 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Project Update The current state of your project write up –Even in the early stages of the project you should be able to write a rough draft of the Introduction and Motivation section The current state of your Final Presentation What things are work & not working What roadblocks are you running into

5 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Introduction to common Compute Models What you should learn

6 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Design patterns –Why are they useful? –Examples Compute models –Why are they useful? –Examples Outline

7 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Design patterns –Why are they useful? –Examples Compute models –Why are they useful? –Examples Outline

8 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) References Reconfigurable Computing (2008) [1] –Chapter 5: Compute Models and System Architectures Scott Hauck, Andre DeHon Design Patterns for Reconfigurable Computing [2] –Andre DeHon (FCCM 2004) Type Architectures, Shared Memory, and the Corollary of Modest Potential [3] –Lawrence Snyder: Annual Review of Computer Science (1986)

9 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Compute Models [1]: High-level models of the flow of computation. Useful for: –Capturing parallelism –Reasoning about correctness –Decomposition –Guide designs by providing constraints on what is allowed during a computation Communication links How synchronization is performed How data is transferred Compute Models

10 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Function[1]: A deterministic, mathematical function that maps each finite input to a finite output –Y = F(X) –Y= [y 0,y 1,y 2...,y n ], X=[x 0,x 1,x 2...,y n ] –Output only depends on inputs (i.e. no internal state) –Can be composed: Y = (F o G)(X) = F(G(X)) Object[1]: Function + internal state information –Y i = F(X i, Y i-1 ) –O = {O.s, O.f} –Y,O.s i = O.f(X,O.s i-1 ) Basic Elements

11 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Data Flow: –Single-rate Synchronous Data Flow –Synchronous Data Flow –Dynamic Streaming Dataflow –Dynamic Streaming Dataflow with Peeks –Steaming Data Flow with Allocation Sequential Control: –Finite Automata (i.e. Finite State Machine) –Sequential Controller with Allocation –Data Centric –Data Parallel Two High-level Families

12 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

13 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

14 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

15 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

16 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

17 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

18 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Data Flow XX +

19 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Graph of operators that data (tokens) flows through Composition of functions Captures: –Parallelism –Dependences –Communication Data Flow XX +

20 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) One token rate for the entire graph –For example all operation take one token on a given link before producing an output token –Same power as a Finite State Machine Single-rate Synchronous Data Flow update 1 F copy

21 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Each link can have a different constant token input and output rate Same power as signal rate version but for some applications easier to describe Automated ways to detect/determine: –Dead lock –Buffer sizes Synchronous Data Flow update 1 F 1 10 copy

22 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Token rates dependent on data Just need to add two structures –Switch Select Dynamic Steaming Data Flow Switch Select S S in0in1 out in out0out1

23 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Token rates dependent on data Just need to add two structures -Switch, Select More –Powerful –Difficult to detect Deadlocks Still Deterministic Dynamic Steaming Data Flow Switch S Select x x y y F0F1 1 x x y y

24 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Allow operator to fire before all inputs have arrived –Example were this is useful is the merge operation No execution can be nondeterministic –Answer depends on input arrival times Dynamic Steaming Data Flow with Peeks Merge

25 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Allow operator to fire before all inputs have arrived –Example were this is useful is the merge operation Now execution can be nondeterministic –Answer depends on input arrival times Dynamic Steaming Data Flow with Peeks Merge A

26 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Allow operator to fire before all inputs have arrived –Example were this is useful is the merge operation Now execution can be nondeterministic –Answer depends on input arrival times Dynamic Steaming Data Flow with Peeks Merge B A

27 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Allow operator to fire before all inputs have arrived –Example were this is useful is the merge operation Now execution can be nondeterministic –Answer depends on input arrival times Dynamic Steaming Data Flow with Peeks Merge B A

28 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Removes the need for static links and operators. That is the Data Flow graph can change over time More Power: Turing Complete More difficult to analysis Could be useful for some applications –Telecom applications. For example if a channel carries voice verses data the resources needed may vary greatly Can take advantage of platforms that allow runtime reconfiguration Steaming Data Flow with Allocation

29 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Sequence of sub routines –Programming languages (C, Java) –Hardware control logic (Finite State Machines) Transform global data state Sequential Control

30 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Finite state Can verify state reachablilty in polynomial time Finite Automata (i.e. Finite State Machine) S1 S2 S3

31 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Adds ability to allocate memory. Equivalent to adding new states Model becomes Turing Complete Sequential Controller with Allocation S1 S2 S3

32 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Adds ability to allocate memory. Equivalent to adding new states Model becomes Turing Complete Sequential Controller with Allocation S1 S2 S3 S4 SN

33 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Multiple instances of a operation type acting on separate pieces of data. For example: Single Instruction Multiple Data (SIMD) –Identical match test on all items in a database –Inverting the color of all pixels in an image Data Parallel

34 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Similar to Data flow, but state contained in the objects of the graph are the focus, not the tokens flowing through the graph –Network flow example Data Centric S1 D1 D2 SW1 S1 Flow rate Buffer overflow

35 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Multi-threaded: a compute model made up a multiple sequential controllers that have communications channels between them Very general, but often too much power and flexibility. No guidance for: –Ensuring determinism –Dividing application into treads –Avoiding deadlock –Synchronizing threads The models discussed can be defined in terms of a Multi-threaded compute model Multi-threaded

36 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Thread: is an operator that performs transforms on data as it flows through the graph Thread synchronization: Tokens sent between operators Streaming Data Flow as Multithreaded

37 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Thread: is a data item Thread synchronization: data updated with each sequential instruction Data Parallel as Multithreaded

38 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Use when a stricter compute model does not give enough expressiveness. Define restrictions to limit the amount of expressive power that can be used –Define synchronization policy –How to reason about deadlocking Caution with Multithreaded Model

39 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) “A Framework for Comparing Models of computation” [1998] –E. Lee, A. Sangiovanni-Vincentelli –Transactions on Computer-Aided Design of Integrated Circuits and Systems “Concurrent Models of Computation for Embedded Software”[2005] –E. Lee, S. Neuendorffer –IEEE Proceedings – Computers and Digital Techniques Other Models

40 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Next Lecture System Architectures

41 - CPRE 583 (Reconfigurable Computing): Compute Models Iowa State University (Ames) Slides in Progress Need to revise this lecture with figures, and useful animations Add some non-FPGA systems, maybe not since GARP, and PipeRench were discussed in last lecture. Perhaps just mention again –Main reason other archs are not used is economy of scales. Lots of FPGAs are manufacture, thus lowing cost and enable the use of state of the art fab technology (given high performance