Operating Systems Lecture No. 2

Basic Elements  At a top level, a computer consists of a processor, memory and I/ O Components.  These components are interconnected in some fashion to achieve the main function of a computer.  The main function is to “Execute the Programs”  The four main structural elements are: 1. Processor 2. Main Memory 3. I/ O Modules 4. System Bus

Discussion

Processor Registers  A processor includes set of registers that provide a type of memory that is faster and smaller than main memory.  There are two functions of the registers in the processor.  1. User Visible Register Enables the machine or Assembly Language programmer to minimize main memory references by optimizing register use. For high level languages an optimizing compiler is used.

Processor Registers  2. Control and Status Register Used by the processor to control the operation of the processor. Note that there is not a clean separation of the registers. For example on some machines the program counter is not visible but on many it is. For purposes of the following discussions, however it is convenient to use these categories.

User Visible Registers  A user visible register may be referenced by means of the machine language that the processor executes and is generally available to all programs, including application programs as well as system programs.  The types of registers that are typically available are;  Data Registers  Address Registers (Index Addresses, Segment Pointer (Chapter 7) and Stack Pointer  Control Register (Program Counter, Instruction Register)

Instruction Execution  A program to be executed by a processor consists of a set of instructions stored in memory.  In simplest form, instruction processing consists of two types, Fetch and Execute.  Program execution consists of repeating the process of instruction fetch and instruction execution.  The processing required for a single instruction is called an instruction cycle.

Instruction Fetch and Execute  At the beginning of each instruction cycle, the processor fetches an instruction from the memory.  The PC holds the address of next instruction to be fetched.  The processor always increment the PC after each instruction is fetched so that it may be able to fetch the next instruction in sequence.  So for example consider a simplified computer in which each instruction occupies one 16 bit word of memory.

Instruction Fetch and Execute (Continued)

The Memory Hierarchy  The design constraints on a computer memory can be summed up by three questions;  How much?  How fast?  How expensive?  The question of how much is some what open ended.  If the capacity is there, applications will likely be developed to use it.  The question of how fast is lot easier to answer, to achieve the speed memory must be able to cope up with the processor.

The Memory Hierarchy (Continued)  The final question how expensive depends on the technology to be used.  As might be expected, there is a tradeoff among the three characteristics of memory namely: cost, capacity and access time.  Faster access time, greater cost per bit  Greater capacity, smaller cost per bit  Greater capacity, slower access speed

The Memory Hierarchy (Continued)  The dilemma facing the designer is clear.  The designer would love to have greater capacity, faster access less cost.  However in real time the designer needs to use expensive, relatively lower capacity memories with faster access time to improve the performance.  The way out to this dilemma is not on just a single memory component.

The Memory Hierarchy (Continued)  Decreasing cost per bit  Increasing capacity  Increasing access time  Decreasing frequency of access to the memory by the processor

Cache Memory  Although cache memory is invisible to the operating system, it interacts with other memory management hardware. You will come to know this in depth in chapter 8 when the virtual memory schemes will be discussed  What can be the motivation behind cache memory?  On all instruction cycles, the processor accesses memory at least once, to fetch the instructions and often one or more additional times, to fetch the operands or store the result.

Cache Memory (Continued)  The rate at which the processor can execute instructions is clearly limited by the memory cycle time.  Memory cycle time is the time that is used to read or write one word from or to the memory.  This has certainly a cause of problem because of the mismatch of processor and main memory speeds.  Over the time, processors speed has consistently increased than memory access speed.

Cache Memory (Continued)