Commissioning of ICAL prototype detector electronics B.Satyanarayana TIFR, Mumbai
2B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April The team Anita Behere, V.B.Chandratre, V.M.Datar, Sudheer K.Mohammed, P.K.Mukhopadhyay, S.M.Raut, R.S.Shastrakar, Vaishali Shedam Bhabha Atomic Research Centre, Mumbai, Satyajit Jena Indian Institute of Technology Bombay, Mumbai, Sarika Bhide, Manas Bhuyan, S.R.Joshi, S.D.Kalmani, Shekhar Lahamge, N.K.Mondal, P.Nagaraj, B.K.Nagesh, Shobha K. Rao, L.V.Reddy, Asmita Redij, M.Saraf, B.Satyanarayana, R.R.Shinde, S.S.Upadhya, P.Verma Tata Institute of Fundamental Research, Mumbai,
3B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Electronics scheme for prototype Design and fabrication of almost all the components is completed
4B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April RPC stack for ICAL prototype
5B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April BigStack status X-plane Telescope
6B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Prototype electronics checklist Preamp for prototype detector 16-channel analog front-end 16-channel analog front-end 32-channel digital front-end 32-channel digital front-end Control and data router Control and data router Trigger and TDC router Trigger and TDC router Data and monitor control module Data and monitor control module Data and monitor readout Module Data and monitor readout Module Final trigger module Power supplies & monitoring Power supplies & monitoring On-line monitoring & services On-line monitoring & services DAQ & analysis software DAQ & analysis software Summary and action plan
7B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Front-end inventory per layer 2 planes (X & Y) 64 readout channels 8 preamplifier boards 4 Analog Front Ends 2 Digital Front Ends
8B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Preamplifiers HMCsHMCs inventory HMCs First stage negative input(1595): 1500 pcs First stage negative input(1595): 1500 pcs First stage positive input(1597): 1500 pcs First stage positive input(1597): 1500 pcs Second stage(1513): 1400 pcs Second stage(1513): 1400 pcs types of preamps for X and Y planes XYXY Cascaded HMCs, Gain: 80, 8-in-1 Gain: 80Gain: 80 Rise time: 3nS, Noise band: ±7mV Need about 100 boards per stack About 15 ready, 6 installed on X-plane Installation in full swing … Problem with Y-plane boards
9B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Characterisation of the front-end
10B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April channel analog front-end Functions To digitize the preamp signals To digitize the preamp signals To form the pre-trigger (Level-0) logic To form the pre-trigger (Level-0) logic Signal shaping Signal shapingFeatures Based on the AD96687 ultra- fast comparator Based on the AD96687 ultra- fast comparator Common adjustable threshold going up to 500mV Common adjustable threshold going up to 500mV V Th now at -20mV V Th now at -20mV ECL output for low I/O delay and fast rise times ECL output for low I/O delay and fast rise times
11B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April channel digital front-end Functions Latch RPC strip status on trigger Latch RPC strip status on trigger Transfer latched data serially through a daisy chain to the readout module Transfer latched data serially through a daisy chain to the readout module Time-multiplex strip signals for noise rate monitoring Time-multiplex strip signals for noise rate monitoring Generate Level-1 trigger signals Generate Level-1 trigger signalsFeatures Latch, shift register, multiplexer are implemented in CPLD XC95288 Latch, shift register, multiplexer are implemented in CPLD XC95288 Trigger logic is built into a CPLD XC9536; flexible Trigger logic is built into a CPLD XC9536; flexible Data transfer rates of up to 10MHz Data transfer rates of up to 10MHz
12B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Control and data router To route the control signals and shift clock from controller to the individual FEP modules To route the latch data from all the FEPs to the readout module To route strip signals from FEPs to the scalers for noise rate monitoring
13B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Trigger and TDC router To route the m-Fold signals from each RPC plane to the final trigger module To route TDC stop signals (1-Fold) from each plane to the TDC module All signals are in LVDS logic, except TDC stop signals which are in ECL logic for achieving better timing resolution
14B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Data and monitor control module On FTO, triggers all the FEPs to latch the strip signals Initiates serial data transfer to the readout module Manages the noise rate monitoring of strip signals, by generating periodic interrupts and selecting channels to be monitored sequentially CAMAC interface for parameter configuration (like data transfer speed, size, monitoring period) as well as diagnostic procedures
15B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Data and monitor readout Module Supports two serial connections for event data recording of X and Y planes and 8 channels for noise rate monitoring Serial Data converted into 16-bit parallel data and stored temporarily in 4k FIFO buffer Source of LAM for external trigger source CAMAC interface for data readout to Computer
16B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Final trigger module Receives m-fold layer triggers and generates m n fold final trigger Final trigger out (FTO) invokes LAM and is Logic Trigger Out (LTO) vetoed by gated LAM Inputs can be selectively masked The rates of different m n combinations counted by embedded 16-bit scalers Rate monitoring of LTO signal using the built in 24-bit scaler Logic inputs and m n signals are latched on an FTO and can be read via CAMAC commands Implementing using FPGA adds to circuit simplicity and flexibility
17B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Power supplies and monitoring Essentially commercial solutions Low voltage & monitoring CAEN’s 1527 mainframe CAEN’s 1527 mainframe EASY 3000 system EASY 3000 system Multi-channel, adjustable voltage, high current modules Multi-channel, adjustable voltage, high current modules High voltage & monitoring CAEN’s 2527 mainframe CAEN’s 2527 mainframe RPC bias current monitoring CAEN’s 128-channel ADC board in 2527 mainframe CAEN’s 128-channel ADC board in 2527 mainframe
18B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Low voltage current inventory Preamps ±6V 16.32A each ±6V 16.32A eachAFEs +6V 28.8A for each plane +6V 28.8A for each plane -6V 34.8A for each plane -6V 34.8A for each planeDFEs +8V 11.76A for each plane +8V 11.76A for each plane -8V 6.36A for each plane -8V 6.36A for each plane
19B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April On-line monitoring & services On-line web portal for monitoring chambers under test as well as ambient conditions of the laboratories Chambers High voltage and current High voltage and current Strip noise rates Strip noise rates Cosmic muon efficiency Cosmic muon efficiency Ambient parameters Temperature Temperature Relative humidity Relative humidity Barometric pressure Barometric pressure Magnet control and monitoring Gas system control and monitoring Web based electronic log book
20B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Scheme of on-line web portal
21B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Screenshot of DAQ software
22B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April BigStack data analysis
23B.Satyanarayana, TIFR, Mumbai INO Collaboration Meeting, BARC, April Summary and action plan Prototype electronics in reasonable shape Extra manpower for preamp commissioning Efforts to solve Y-plane preamps Hopeful of solving final trigger board issues in a week or so Should be ready by June 2008 Fabrication of scintillator paddles’ in summer GUI front-end for DAQ program Further improvements for monitoring possible