1 5. SOURCES OF ERRORS Fundamentals of low-noise design 5.5. Fundamentals of low-noise design
2 rdrd IDID e dsh rdrd i dsh IDID 5. SOURCES OF ERRORS Fundamentals of low-noise design Junction-diode noise model 4) i dsh 2 = 2 q I D = 2 k T / r d 3) r d k Tq IDk Tq ID 5) e dsh 2 = (2 k T / r d ) r d 2 = 2 k T r d 2) i dsh 2 2 q ( I F + I S ) 2 q ( I D + 2I S ) 2 q I D Junction-diode noise model 1) I D I S e I S I F I S V D /V T IDID At low frequencies and I D >> I S, i dn 2 = 2 q I D K f I D f, K f = 2 q f f Note that dynamic resistances do not generate any thermal noise since them dissipate no power, v d i d = 0. i df i df r d
3 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model BJT noise model rbrb i csh B E C Noiseless v bt i bf i bsh i csh 2 = 2 q I C i bsh 2 = 2 q I B v bt 2 = 4 k T r b i bf 2 K f I B f NB: i cf 0 i ct 0
4 vsvs RSRS rr icic h fe i roro rbrb BC i csh 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model A. Total input noise i bf i bsh ii v bt v n s (t) v st (t) v bt (t) i bf (t) i bsh (t)](R S r b ) i csh (t) R S +r b +r h fe 1) Total input noise vs. time, v n s (t). 2) Power spectral density of the total input noise, v n s 2 ( f ). v bt v n s ?
5 vsvs RSRS rr icic h fe i roro C i csh 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model A. Total input noise i bf i bsh ii v n s (t) v st (t) v bt (t) i bf (t) i bsh (t)](R S r b ) i csh (t) R S +r b +r h fe 1) Total input noise vs. time, v n s (t). 2) Power spectral density of the total input noise, v n s 2 ( f ). v n s 2 4 k T (r b R S ) i bf 2 i bsh 2 )(R S r b ) 2 i csh 2 R S +r b +r h fe 2 v n s ? rbrb v bt v n s B
6 v n s 2 4 k T (r b R S ) + 2 q I C (R S r b ) 2 h fe 2 q I C R S +r b +h fe V T / I C h fe 2 v n s 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model B. Optimum collector current I C opt h fe V T h fe 0.5 (R S r b ) rr icic h fe i roro rbrb BCii v bt v n s 2 4 k T (r b R S ) i bsh 2 (R S r b ) 2 i csh 2 R S +r b +r h fe 2 RSRS i bf 0 Reference: [7]
7 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model C. e n i n noise model e n 2 v n s 2 4 k T r b i bf 2 i bsh 2 ) r b 2 i csh 2 r b +r h fe 2 RS= 0RS= 0 i n 2 i bf 2 i bsh 2 v n s 2 R S 2 RS= RS= i csh 2 h fe 2 vsvs RSRS rr icic h fe i roro rbrb BCii enen inin v n s 2 4 k T (r b R S ) i bf 2 i bsh 2 )(R S r b ) 2 i csh 2 R S +r b +r h fe 2
8 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model B E C e n 2 4 k T r b i bf 2 i bsh 2 ) r b 2 i csh 2 r b +r h fe 2 i n 2 i bf 2 i bsh 2 i csh 2 h fe 2 enen inin BJT e n i n noise model f >> f f r b = 100 I C = 1 mA h fe = 100 e n 1.36 nV/Hz 0.5 i n 1.8 pA/Hz 0.5 e n / i n 756 R S = 756 i n R S = 1.4 nV/Hz 0.5
9 5. SOURCES OF ERRORS Fundamentals of low-noise design BJT noise model D. Optimum source resistance at I C opt vsvs RSRS rr icic h fe i roro rbrb BCii R s opt eninenin I C opt r b 2 1 + 1+h fe enen inin I C opt
10 i gsh 2 = 2 q I G i df 2 K f I D f JFET noise model 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model i dt G S D Noiseless i gsh i df NB: i dsh 0 i dt 2 = 4 k T /(3/2 g m )
11 idid 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model g m v gs roro GD igig Equivalent small-signal model i gsh i dt i df v gs r gs
12 idid 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model 1/g m g m v gs roro GD igig i gsh i dt i df v gs r gs Equivalent small-signal model
13 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model ~1/g m g m v gs roro GD igig i gsh i dt i df v gs Equivalent small-signal model
14 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model idid vsvs RSRS ~1/g m g m v gs roro GD igig 1) Total input noise vs. time, v n s (t). v n s ? A. Total input noise i gsh i dt i df v gs
15 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model vsvs RSRS ~1/g m idid g m v gs roro GD 1) Total input noise vs. time, v n s (t). A. Total input noise i dt i df v n s ? i gsh i gsh R s v n s (t) v st (t) + i gsh (t) R S i df (t) i dt (t)](1/g m ) v gs igig
16 v n s ? 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model vsvs RSRS ~1/g m idid g m v gs roro D i gsh R s i dt i df v n s G A. Total input noise 1) Total input noise vs. time, v n s (t). v n s (t) v st (t) + i gsh (t) R S i df (t) i dt (t)](1/g m ) 2) Power spectral density of the total input noise, v n s 2 ( f ). v n s 2 4 k T R S + i gsh 2 R S 2 i df 2 i dt 2 )/g m 2 v gs igig
17 v n s ? 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model B. e n i n noise model e n 2 v n s 2 i df 2 i dt 2 )/g m 2 R S = 0 i n 2 i gsh 2 v n s 2 R S 2 R S = vsvs RSRS ~1/g m idid g m v gs roro D i gsh R s i dt i df v n s 2 4 k T R S + i gsh 2 R S 2 i df 2 i dt 2 )/g m 2 v n s enen inin G v gs igig
18 5. SOURCES OF ERRORS Fundamentals of low-noise design JFET noise model G S D enen inin e n 2 i df 2 i dt 2 )/g m 2 i n 2 i gsh 2 JFET e n i n noise model f >> f f V p = 2 V I DSS = 10 mA I G = 10 pA e n 1.8 nV/Hz 0.5 i n 1.8 fA/Hz 0.5 e n /i n 1 M R S = 1 M i n R S = 1.8 nV/Hz 0.5 f >> f f r b = 100 I C = 1 mA h fe = 100 e n 1.36 nV/Hz 0.5 i n 1.8 pA/Hz 0.5 e n / i n 756 R S = 756 i n R S = 1.4 nV/Hz 0.5 BJT
19 i dt 2 = 4 k T /(3/2 g m ) i df 2 K f I D f MOSFET noise model 5. SOURCES OF ERRORS Fundamentals of low-noise design MOSFET noise model i dt G S D Noiseless i df NB: i gsh 0 i dsh 0
20 idid 5. SOURCES OF ERRORS Fundamentals of low-noise design MOSFET noise model 1/g m g m v gs roro D v n s (t) v st (t) i df (t) i dt (t)](1/g m ) 1) Total input noise vs. time, v n s (t). 2) Power spectral density of the total input noise, v n s 2 ( f ). v n s 2 4 k T R S + i df 2 i dt 2 )/g m 2 A. Total input noise i dt i df v n s ? vsvs RSRS G
21 v n s 5. SOURCES OF ERRORS Fundamentals of low-noise design MOSFET noise model B. e n i n noise model e n 2 v n s 2 i df 2 i dt 2 )/g m 2 R S = 0 i n 2 0 v n s 2 R s 2 R S = 1/g m idid g m v gs roro D v n s 2 4 k T R S + i df 2 i dt 2 )/g m 2 vsvs RSRS enen inin G
22 5. SOURCES OF ERRORS Fundamentals of low-noise design MOSFET noise model G S D enen e n 2 i df 2 i dt 2 )/g m 2 i n 0 MOSFET e n i n noise model f >> f f V p = 2 V I DSS = 10 mA e n 1.8 nV/Hz 0.5 f >> f f V p = 2 V I DSS = 10 mA I G = 10 pA e n 1.8 nV/Hz 0.5 i n 1.8 fA/Hz 0.5 e n /i n 1 M R S = 1 M i n R S = 1.8 nV/Hz 0.5 JFET
Frequency response effect 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect rr icic h fe i roro rbrb C i csh i bf i bsh ii v bt V CC i C C C V BB v s RSRS vsvs RSRS B The aim is to analyze the dependence of a transistor e n and i n on frequency and the operating point.
24 vsvs RSRS Ag Ag 1) Transconductance gain 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect rr icic h fe i roro rbrb BC ii C C icvsicvs is= 1is= 1 h fe [1/j 2 f (C +C )]/[r +1/j 2 f (C +C )] R S + r b + r II [1/j 2 f (C +C )] h fe /(R S +r b +r ) 1+j 2 f [(R S + r b ) II r ](C +C ) isis A. Total input noise
25 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect rr icic h fe i roro rbrb C i csh i bf i bsh ii v bt C C 2) Power spectral density of the total input noise, v n s 2 ( f ). v n s 2 4 k T (R S +r b ) i bf 2 i bsh 2 ) (R S +r b ) 2 i csh 2 R S +r b +r h fe 2 [1 2 f ) 2 ] vsvs RSRS B v n s h fe /(R S +r b +r ) 1+j 2 f A g [(R S + r b ) II r ](C +C )
26 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect 3) e n and i n of the transistor. v n s 2 4 k T (R S +r b ) i bf 2 i bsh 2 ) (R S +r b ) 2 i csh 2 R S +r b +r h fe 2 [1 2 f ) 2 ] e n 2 v n s 2 4 k T r b i bf 2 i bsh 2 ) r b 2 R S = 0 in2 in2 v n s 2 R S 2 R S = i csh 2 r b +r h fe 2 [1 2 f en ) 2 ] i bf 2 i bsh 2 [1 2 f in ) 2 ] i csh 2 h fe 2 en (r b II r )(C +C ) in r (C +C )
27 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect rr icic h fe i roro rbrb C ii C C vsvs RSRS B e n 2 4 k T r b i bf 2 i bsh 2 ) r b 2 in2 in2 i csh 2 r b +r h fe 2 [1 2 f en ) 2 ] i bf 2 i bsh 2 [1 2 f in ) 2 ] i csh 2 h fe 2 enen inin B. e n i n noise model for high-frequencies
28 I C opt = 24 mA I C = 0.1 mA 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect e n ( f ) nV/Hz 0.5 A g A g max dB f, Hz C. e n ( f ) for different I C r b 100 h fe 100 C 1 pF C (1 mA) 100 pF r b 100 h fe 100 C 1 pF C (1 mA) 100 pF e n 2 4 k T r b i bf 2 i bsh 2 ) r b 2 i csh 2 r b +r h fe 2 [1 2 f en ) 2 ]
29 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect D. i n ( f ) for different I C I C opt = 24 mA I C = 0.1 mA i n ( f ) pA/Hz 0.5 A g A g max dB f, Hz r b 100 h fe 100 C 1 pF C (1 mA) 100 pF r b 100 h fe 100 C 1 pF C (1 mA) 100 pF in2 in2 i bf 2 i bsh 2 [1 2 f in ) 2 ] i csh 2 h fe 2
30 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect E. Noise simulation in PSPICE Frequency 1.0Hz10KHz100MHz1.0THz V(ONOISE)*1G/10 V(Out1)/V(V1:+)/10 V(INOISE)*1G
31 5. SOURCES OF ERRORS Fundamentals of low-noise design Comparison of the BJT, JFET and MOSFET Comparison of the BJT, JFET and MOSFET r b 40 h fe 500 r o I C 1 mA r b 40 h fe 500 r o I C 1 mA I DSS 2 mA V p 2 V r o I D 1 mA v n s 2 4 k T R S + i gsh 2 R S 2 i df 2 i dt 2 )/g m 2 v n s 2 4 k T (r b R S ) i bf 2 i bsh 2 )(R S r b ) 2 i csh 2 R S +r b +r h fe 2 v n s 2 4 k T R S + i df 2 i dt 2 )/g m 2
32 5. SOURCES OF ERRORS Fundamentals of low-noise design Comparison of the BJT, JFET and MOSFET R S, v n s nV/Hz 0.5 Power spectral density of the total input noise v n s as a function of R S I C opt The 1/f noise is neglected. The JFET gate current is neglected.
33 5. SOURCES OF ERRORS Fundamentals of low-noise design Frequency response effect Example: Comparison of an BJT and JFET in PSPICE R S = 10 k R S = 100
34 5. SOURCES OF ERRORS Fundamentals of low-noise design Comparison of the BJT, JFET and MOSFET Reference: [9] Conclusion: Guide for selection of the preamplifier k10 k100 k1 M10 M100 M1 G10 G100 G MOSFET Transformer coupling IC amplifiers BJT Source resistance, R S JFET
Noise analysis of a CE amplifier RSRS R C R E V CC V BB v s 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i roro rbrb RERE RCRC B E C i csh vsvs RSRS i bf i bsh ii v et v bt v st v ct ro ro
36 Our final aim is to find and minimize the total input noise v n s. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i rbrb RERE RCRC B E C i csh vsvs RSRS i bf i bsh ii v et v bt v st v n s ? v ct Let us first find v n s by applying superposition.
37 A s G s G s s fwd A OL 1 A OL iovsiovs 1) Signal gain A s for v s, v st, v bt, and v et. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i rbrb RERE RCRC B E C vsvs RSRS ii A s 1RSrbrRE1RSrbrRE h fe 1 h fe R E /(R E R S r b r ) 00 v et v bt v st
38 A bf G ibf G bf bf fwd A OL 1 A OL i o i bf 2) Noise gain A bf for i bf and i bsh. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i rbrb RERE RCRC B E C vsvs RSRS i bf i bsh ii A bf R S r b R E R S r b R E r h fe 1 h fe R E /(R E R S r b r ) 00
39 A csh G csh G csh csh fwd A OL 1 A OL i o i csh rr ioio h fe i rbrb RERE RCRC B E C i csh vsvs RSRS ii 3) Noise gain A csh for i csh. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit A csh R E R E R S r b r h fe 1 h fe R E /(R E R S r b r ) 11
40 A ct G ct G ct ct fwd A OL 1 A OL i o i ct 4) Noise gain A ct for i csh. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i RERE RCRC B E C vsvs RSRS ii v ct /R C rbrb A csh 1RC1RC
41 5) Total input noise vs. time, v n s. 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit rr ioio h fe i RERE RCRC B E C vsvs RSRS ii v n s v n s (t) v st v bt v et (i bf i bsh ) A bf A s i csh A csh A s v ct A ct A s rbrb v n s 2 ( f ) 4kT R SbE +(i bf 2 i bsh 2 ) R SbE 2 (R SbE r ) 2 h fe 2 i csh 2 4kT 1 R C A s 2 0 0 R SbE R S r b R E
42 rr icic h fe i RCRC BC rbrb vsvs RSRS (1+h fe ) R E E RERE E 6) e n i n noise model. enen inin i n 2 i bf 2 i bsh 2 i csh 2 h fe 2 e n s 2 R S 2 R S = e n 2 e n s 2 4 k T R bE i bf 2 i bsh 2 ) R bE 2 i csh 2 (R bE +r ) 2 h fe 2 R S = 0 ii R bE r b R E 5. SOURCES OF ERRORS Fundamentals of low-noise design Example circuit
43 R SbE 2 h fe I C opt h fe V T h fe 0.5 R SbE r b = 100 R S = 200 R E = 200 i bf 2 = 0 v bt 2 = 4 k T r b v et 2 = 4 k T R E i bsh 2 = 2 q I C / i csh 2 = 2 q I C 7) Minimizing CE noise. v n s min 2 4 k T R SbE (1 + h fe ) 0.5 (1 + h fe ) 0.5 1 v n s 2 4 k T R SbE 2 q I C 2 q IC2 q IC R SbE +h fe V T /I C h fe e n s norm. dB h fe h fe =10 4 h fe =10 2 h fe =10 3 I C / I C opt e n s norm. dB SOURCES OF ERRORS Fundamentals of low-noise design Example circuit Reference: [7]
44 Next lecture Appendix: Noise analysis of the CE without applications of superposition Reference: [7]
45 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis Noise analysis of a CE amplifier rr icic h fe i roro rbrb RERE RCRC B E C i csh v n s ? vsvs RSRS i bf i bsh ii v et v bst RSRS R C R E V CC V BB v s
46 rr ii icic h fe i roro rbrb RERE RCRC B E C i csh v n s ? vsvs RSRS v et v bst 1) Disconnecting i bf and i bsh sources. i bf i bsh i bf i bsh 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
47 i bf i bsh i bf i bsh rr ii icic h fe i roro RCRC C i csh RERE E rbrb B v n s vsvs RSRS ? v et v ne = v et (i bf + i bsh ) R E 1) Disconnecting i bf and i bsh sources. v bst 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
48 rr icic h fe i roro rbrb RERE RCRC B E C i csh v et v n s ? vsvs RSRS i bf i bsh v ne = v et (i bf + i bsh ) R E 1) Disconnecting i bf and i bsh sources. ii ii v bst v bst (i bf i bsh ) (R s r b ) 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
49 rr icic h fe i roro rbrb RERE RCRC BC ro ro i csh v et E v n s ? vsvs RSRS v ne = v et (i bf + i bsh ) R E 2) Disconnecting i bf and i bsh sources. v bst (i bf i bsh ) (R s r b ) ii 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
50 rr icic h fe i rbrb RCRC BC RERE i csh v et E v n s ? vsvs RSRS v ne = v et (i bf + i bsh ) R E 2) Disconnecting i bf and i bsh sources. v bst (i bf i bsh ) (R s r b ) ii 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
51 v et rr icic h fe i rbrb RCRC BC RERE (1+h fe ) R E i csh E v n s ? vsvs RSRS v ne = v et (i bf + i bsh ) R E 2) Disconnecting i bf and i bsh sources. v bst (i bf i bsh ) (R s r b ) v ne = v et (i bf + i bsh ) R E + i csh R E ii 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
52 rr icic h fe i rbrb RCRC BC i csh v ne = v et (i bf + i bsh ) R E + i csh R E E (1+h fe ) R E v n s ? v n s (t) i c (t) R S +r b +r +(1+h fe )R E h fe vsvs RSRS 3) Reflecting i bf and i bsh to v n s. v bst (i bf i bsh ) (R s r b ) v n s (t) v bst (t) v et (t) i bf (t) i bsh (t)] R * ? ii R * R S r b R E 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
53 2) i c h fe R S +r b +r +(1+h fe )R E i csh (t) i csh (t) R E rr icic rbrb RCRC BC i csh (1+h fe ) R E i csc R E E v n s ? vsvs RSRS h fe i 1) v n s i c (t), R S +r b +r +(1+h fe )R E h fe 3) v n s i csh (t) R E i csh (t) R S +r b +r +(1+h fe )R E h fe i csh (t) R * + r h fe 3) Reflecting i csh to v n s. ii R * R S r b R E 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
54 rr icic h fe i rbrb RCRC BC (1+h fe ) R E E v n s vsvs RSRS 4) Total input noise vs. time, v n s (t). ii v n s (t) v bst (t) v et (t) i bf (t) i bsh (t)] R * i csh (t) R * + r h fe R * R S r b R E 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
55 rr icic h fe i rbrb RCRC BC v n s vsvs RSRS v n s (t) v bst (t) v et (t) i bf (t) i bsh (t)] R * i csh (t) R * + r h fe v n s 2 4 k T R * i bf 2 i bsh 2 ) R * 2 i csh 2 R * + r h fe 2 (1+h fe ) R E E RERE E 5) Power spectral density of the total input noise, v n s 2. ii R * R S r b R E 5. SOURCES OF ERRORS Fundamentals of low-noise design. Appendix: conventional noise analysis
56 Next lecture Next lecture: