001-95006Owner: JAYA Cypress Timing Solutions Roadmap Rev*BBUM: CNX Q1 2015 Cypress Roadmap: Timing Solutions.

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Presentation transcript:

Owner: JAYA Cypress Timing Solutions Roadmap Rev*BBUM: CNX Q Cypress Roadmap: Timing Solutions

Owner: JAYA Cypress Timing Solutions Roadmap Rev*BBUM: CNX Clock GeneratorsClock Buffers EMI ReductionNon-EMI ReductionZero Delay Buffer (ZDB)Non-Zero Delay Buffer (NZDB) Timing Solutions Portfolio Programmable | High-Performance | EMI Reduction | Automotive CY2429x Max. Frequency: 200 MHz 2-4 outputs; PCIe ps CCJ 3 ; Ind 2 CY24293A Max. Frequency: 200 MHz 2 outputs; 1 PLL; PCIe ps CCJ 3 ; Auto A 5 CY22050/150 Max. Frequency: 200 MHz 3-6 outputs; 1 PLL 250-ps CCJ 3 ; Ind 2 CY22800/801 Max. Frequency: 166 MHz 3 outputs; 1 PLL 250-ps CCJ 3 ; Ind 2 CY2239x/CY229x/CY2238x Max. Frequency: 200 MHz 3-6 outputs; 3-4 PLL; I 2 C 400-ps CCJ 3 ; Ind 2 ; Auto E 4 CY2Xx (FleXO™) Max. Frequency: 690 MHz 1 output; Frequency Margining 0.6-ps RMS Jitter 1 ; Ind 2 CY254x/CY251x Max. Frequency: 166 MHz 3-9 outputs; 1-4 PLL; I 2 C 100-ps CCJ 3 ; Ind 2 CY7B99x (RoboClock™) Max. Frequency: 200 MHz 8-18 outputs; Configurable Skew 50-ps CCJ 3 ; Ind 2 CY23S02/05/08/09/FP12 Max. Frequency: 200 MHz 2-12 outputs; Spread Aware 200-ps CCJ 3 ; Ind 2 CY23FS04/08 Max. Frequency: 200 MHz 4-8 outputs; Fail Safe ps CCJ 3 ; Ind 2 CY230x/EP0x Max. Frequency: 220 MHz 5-9 outputs; LVCMOS 22-ps CCJ 3 ; Ind 2 ; Auto A 5 CY2DLx/DMx/DPx/CPx Max. Frequency: 1.5 GHz 2-10 outputs; LVDS, LVPECL, CML 0.05-ps RMS Jitter 1 ; Ind 2 CY230xNZ Max. Frequency: 133 MHz 4-18 outputs; LVCMOS 250-ps CCJ 3 ; Ind 2 1 Integrated phase noise across 12-kHz to 20-MHz offset 2 Industrial grade -40ºC to +85ºC 3 Cycle-to-cycle jitter 4 AEC-Q100: -40ºC to +125ºC 5 AEC-Q100: -40ºC to +85ºC 6 Automatic clock switching on failure of a clock source Standard Performance High Performance Application Specific 4-PLL Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter 1 Contact Sales Programmable XO/VCXO Max. Frequency: 2.1 GHz 0.15-ps RMS Jitter 1 NDA Required; Contact Sales PCIe 3.0 Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter 1 Contact Sales 2-PLL Clock Generator Max. Frequency: 700 MHz 0.7-ps RMS Jitter 1 Contact Sales ProductionDevelopment QQYY Availability Sampling Concept Status Q115 NEW

Owner: JAYA Cypress Timing Solutions Roadmap Rev*BBUM: CNX PCI Express Clock AEC-Q100 (CY24293A) Automotive infotainment systems Applications Two sets of differential PCIe 1.1 clocks Pin-selectable output frequencies Two HCSL outputs Spread-spectrum capability Cycle-to-cycle jitter <75 ps Features Preliminary Datasheet: Contact SalesContact Sales Collateral Block Diagram Sampling: Now Production:Q Availability 1 Crystal input 2 Crystal output 3 Frequency select inputs Oscillator Block PLL XIN 1 XOUT 2 PCI Express Clock Control Logic FS0 3 FS1 3 Out1P Out1N Out2P Out2N