Penn ESE370 Fall2010 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 1: September 8, 2010 Introduction and.

Slides:



Advertisements
Similar presentations
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 24: November 4, 2011 Synchronous Circuits.
Advertisements

1-1 Welcome to: CSC225 Introduction to Computer Organization Paul Hatalsky.
Design and Implementation of VLSI Systems (EN0160) Sherief Reda Division of Engineering, Brown University Spring 2007.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 27: November 5, 2014 Dynamic Logic Midterm.
ECE 232 L1 Intro.1 Adapted from Patterson 97 ©UCBCopyright 1998 Morgan Kaufmann Publishers ECE 232 Hardware Organization and Design Lecture 1 Introduction.
9/20/2004EE 42 fall 2004 lecture 91 Lecture #9 Example problems with capacitors Next we will start exploring semiconductor materials (chapter 2). Reading:
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 28: November 15, 2013 Memory Periphery.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 36: December 7, 2012 Transmission Line.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 30: November 12, 2014 Memory Core: Part.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 38: December 3, 2014 Transmission Lines.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 39: December 6, 2013 Repeaters in Wiring.
Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 1-1 Welcome to: CSC225 Introduction to Computer Organization.
CPSC 321 Introduction to Logic Circuit Design Mihaela Ulieru (‘Dr. M’)
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 35: December 5, 2012 Transmission Lines.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 1: September 5, 2012 Introduction and.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 3: September 3, 2014 Gates from Transistors.
Lecture No. 1 Computer Logic Design. About the Course Title: –Computer Logic Design Pre-requisites: –None Required for future courses: –Computer Organization.
1 CPRE210: Introduction to Digital Design Instructor –Arun K. Somani –Tel: – –Office Hours: MWF 10:00-11:00 Teaching Assistant.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 27: November 14, 2011 Memory Core.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 24: November 5, 2010 Memory Overview.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: August 30, 2013 Transistor Introduction.
CSC Intro. to Computing Lecture 5: Gates, Circuits, & Transistors.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 7: September 22, 2010 Delay and RC Response.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 1: September 7, 2011 Introduction and.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 26: October 31, 2014 Synchronous Circuits.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 32: November 28, 2011 Inductive Noise.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: September 9, 2011 Transistor Introduction.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 22: November 1, 2010 Dynamic Logic.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 30: November 19, 2010 Crosstalk.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 15, 2014 Delay and RC Response.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 1: August 27, 2014 Introduction and Overview.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 33: November 20, 2013 Crosstalk.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 36: December 6, 2010 Transmission Lines.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: August 29, 2014 Transistor Introduction.
Penn ESE534 Spring DeHon 1 ESE534: Computer Organization Day 5: February 1, 2010 Memories.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 3: September 12, 2011 Transistor Introduction.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 22: October 31, 2011 Pass Transistor Logic.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 22: October 22, 2014 Pass Transistor Logic.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 38: December 10, 2010 Energy and Computation.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 6: September 10, 2014 Restoration.
CS151 Introduction to Digital Design Noura Alhakbani Prince Sultan University, College for Women.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 6: September 19, 2011 Restoration.
Penn ESE534 Spring DeHon 1 ESE534 Computer Organization Day 19: March 28, 2012 Minimizing Energy.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 4: September 14, 2011 Gates from Transistors.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 4: September 12, 2012 Transistor Introduction.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 24: November 5, 2012 Synchronous Circuits.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 20: October 25, 2010 Pass Transistors.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 5: September 8, 2014 Transistor Introduction.
TOPIC : Introduction to Sequential Circuits UNIT 1: Modeling and Simulation Module 4 : Modeling Sequential Circuits.
ECEN2102 Digital Logic Design Lecture 0 Course Overview Abdullah Said Alkalbani University of Buraimi.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 30: November 21, 2012 Crosstalk.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 8: September 21, 2012 Delay and RC Response.
Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 6: September 17, 2012 Restoration.
Day 3: September 10, 2012 Gates from Transistors
Day 1: August 28, 2013 Introduction and Overview
Day 6: September 11, 2013 Restoration
EEL 3705 / 3705L Digital Logic Design
Day 22: October 31, 2011 Pass Transistor Logic
Day 31: November 23, 2011 Crosstalk
Day 26: November 1, 2013 Synchronous Circuits
Day 23: November 2, 2012 Pass Transistor Logic: part 2
Day 27: November 6, 2013 Dynamic Logic
Day 25: November 7, 2011 Registers
Review Lectures Mar. 31 – April Note:.
The Processor Lecture 3.1: Introduction & Logic Design Conventions
Day 21: October 29, 2010 Registers Dynamic Logic
Day 2: September 10, 2010 Transistor Introduction
Day 3: September 4, 2013 Gates from Transistors
Day 5: September 17, 2010 Restoration
Instructor: Joel Grodstein
Presentation transcript:

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 1: September 8, 2010 Introduction and Overview

Questions How fast can my computer run? –What limits this speed? –What can I do to make it run faster? How can I extend the battery life on my gadget? –How much energy must my computation take? How small can I make a memory? –Why does DRAM need to be refreshed? Penn ESE370 Fall DeHon 2

Questions How many bits/second can I send over a link? –What limits this? –How do I maximize? How does technology scaling change these answers? What can I rely on technology to deliver? Penn ESE370 Fall DeHon 3

Outline Motivating Questions What this course is about Objectives Structure New… Policies Content Penn ESE370 Fall DeHon 4

Deconstruction Circuit-Level Modeling, Design, and Optimization for Digital Systems Penn ESE370 Fall DeHon 5 Look below the gates …transistors, resistance, capacitance, inductance… Abstract and predict Create Make efficient (fast,low energy,small) Compute, store, transmit binary values (0s, 1s)

What course about What Computer Engineers need to know about the physical properties in order to design efficient digital circuits Physical Properties –Delay, Energy (Power), Area, Reliability Efficient –Fast, Low Energy, Small, Won’t Fail (very often) Digital Circuits –Computation, Storage, Communication Penn ESE370 Fall DeHon 6

What course is about Modeling and abstraction –Predict circuit behavior –Well enough to know our design will work –…with specific properties Speed, energy, …. –Well enough to reason about design and optimization What knob can I turn to make faster? How much faster can I expect to make it? Penn ESE370 Fall DeHon 7

What course is about Modeling and abstraction –Back-of-the-envelope Simple enough to reason about –…without a calculator… –Sensitive to phenomenology Able to think through the details –With computer assistance …understanding even that is a simplified approximation Penn ESE370 Fall DeHon 8

9 You are here. ESE205/215, ESE319 ESE218 Phys151 ESE200 (ESE170) CIS240 CIS371, ESE534 CIS380 CIS120

Objectives Penn ESE370 Fall DeHon 10

You will learn disciplines for robust digital logic and signaling –(e.g., restoration, clocking, handshaking) where delay, energy, area, and noise arises in gates, memory, and interconnect how to model these physical effects –back-of-the-envelope design (e.g. RC and Elmore delay) –detailed simulation (e.g. SPICE) Penn ESE370 Fall DeHon 11

You will learn the nature of tradeoffs in optimization –Among delay, energy, area, noise how to design and optimize –logic, memory, and interconnect structures –at the gate, transistor, and wire level how technology scales – and its impact on digital circuits and computer systems Penn ESE370 Fall DeHon 12

New Course Penn ESE370 Fall DeHon 13

New Course For Penn –Rough edges –Will be some experimentation –Need your feedback (feedback sheets one piece) For Me –Topic about which I’m mostly a consumer Use models to do design higher-level design –How make FPGA, processors, GPU faster, cooler –How {hot,fast} is my {nanowire,NEMS} circuits Do not regularly –Develop low-level models, circuits Penn ESE370 Fall DeHon 14

Structure Penn ESE370 Fall DeHon 15

Structure MWF Lecture Reading from text 4 lecture periods  Lab –3 Detkin (formally RCA) See phenomena first hand before simulate –1 Ketterer  SPICE Intro Penn ESE370 Fall DeHon 16

SPICE Simulation Program with Integrated Circuit Emphasis –Industry standard analog circuit simulator –Non-linear, differential equation solver specialized for circuits Integrated circuits – simply impractical to build to debug –Must simulate to optimize/validate design Penn ESE370 Fall DeHon 17

Structures Homeworks – week long (6 total) Projects – two weeks long (3 total) –Design oriented –On three main topics Computation Storage Communication One midterm Final Penn ESE370 Fall DeHon 18

Admin Won’t bring printouts to class Use course calendar –Lectures online before class (most of the time) –Homeworks linked Homework 1 out now (tied to first lab visit) –Reading specified Penn ESE370 Fall DeHon 19

Policies Penn ESE370 Fall DeHon 20

Policies See web page for details Turnin homework on blackboard –No handwritten homework –Use CAD Tools for circuit drawings Late homework penalty Individual work (HW & Project) –CAD drawings, simulations, analysis, writeups –May discuss strategies, but must acknowledge Penn ESE370 Fall DeHon 21

Content Penn ESE370 Fall DeHon 22

Content Logic (Computation) [7 weeks] –Combinational –Sequential Storage [2 weeks] Communication [3 weeks] Energy and Information [1 week] Penn ESE370 Fall DeHon 23

Content Logic –Transistors  Gates –In Lab: build gate, measure delay, restore –Restoration –Delay –Area (no layout  ESE570) –Energy –Synchronous (flip-flops, clocking, dynamic) –Project: fast (low-power) ripple-carry adder Penn ESE370 Fall DeHon 24

Content Memory –No Lab component –RAM Organization –Driving Large Capacitances –Signal amplification/restoration –Project: design a Register File Penn ESE370 Fall DeHon 25

Content Communication –In Lab Measure inductive ground bounce, crosstalk Experiment with transmissions lines, termination –Noise Crosstalk Inductive Ionizing particles, shot –Transmission Lines –Project: Chip-to-chip signaling Energy and Information Penn ESE370 Fall DeHon 26

Wrapup Admin –Find web, get text, assigned reading… Big Ideas / takeaway –Model to enable design Remaining Questions? Penn ESE370 Fall DeHon 27