FIGURE 11.1 Mapping between OpenCL and CUDA data parallelism model concepts. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach.

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FIGURE 11.1 Mapping between OpenCL and CUDA data parallelism model concepts. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.2 Overview of the OpenCL parallel execution model. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.3 Mapping of OpenCL dimensions and indices to CUDA dimensions and indices. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.4 Conceptual OpenCL device architecture; the host is not shown. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.5 Mapping of OpenCL memory types to CUDA memory types. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.6 A simple OpenCL kernel example. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.7 OpenCL context required to manage devices. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.8 Creating an OpenCL context and command queue. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE 11.9 DCS Kernel Version 3 NDRange configuration. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE Mapping DCS NDRange to OpenCL device. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE Data access indexing in OpenCL and CUDA. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE Inner loop of the OpenCL DCS kernel. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE Building an OpenCL kernel. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”

FIGURE OpenCL host code for kernel launch and. KIRK CH:11 “Programming Massively Parallel Processors: A Hands-on Approach. DOI: /B X © 2010 David B. Kirk/NVIDIA Corporation and Wen-mei Hwu. Published by Elsevier Inc. All rights of reproduction in any form reserved.”