Digital Hisham 1 Fundamentals of Logic Design Counters and Similar Sequential Networks Objectives: To design counter using basic flip-flops To describe other simple sequential networks To derive input equations for a design.

Digital Hisham 2 Counters and Similar Sequential Networks Introduction Counter Code Converter Shift Register Simple Sequential Network Application

Digital Hisham 3 Counters and Similar Sequential Networks Binary Counter Counter Decoder Basic Counting: Counting Up Counting Down

Digital Hisham 4 Counters and Similar Sequential Networks Binary Counter Synchronous Counters Ripple Counters Two types:

Digital Hisham 5 Counters and Similar Sequential Networks Binary Counter Synchronous Counter(Synchronous) FF Pulse Flip-flop operations is synchronized by pulse i.e. Flip-flops change states simultaneously.

Digital Hisham 6 Counters and Similar Sequential Networks Binary Counter Ripple Counter (Asynchronous) FF Pulse Flip-flop state change of one flip-flop triggers the next flip-flop in line

Digital Hisham 7 Counters and Similar Sequential Networks Synchronous Binary Counter Design: 3-bits counter Requirements:- Synchronous Count Up Use T flip-flop/ J-K flip-flop Reset to 0

Digital Hisham 8 Counters and Similar Sequential Networks Synchronous Binary Counter 3-bits counter Reset Reset State Graph

Digital Hisham 9 Counters and Similar Sequential Networks Synchronous Binary Counter 3-bits counter (cont’d) ABC Present State Next State A B C A + B + C State Table

Digital Hisham 10 Counters and Similar Sequential Networks Synchronous Binary Counter 3-bits counter: Using T Flip-flop T Q Q Q Q’ T CK

Digital Hisham 11 Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C T-FF Inputs T A T B T C A B C A + B + C T B =0 T A =0 T C =1 3-bits counter: Using T Flip-flop (cont’d)

Digital Hisham 12 Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C T-FF Inputs T A T B T C A B C A + B + C T B =1 T A =0 T C =1 3-bits counter: Using T Flip-flop (cont’d)

Digital Hisham 13 Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C T-FF Inputs T A T B T C A B C A + B + C T B =0 T A =0 T C =1 3-bits counter: Using T Flip-flop (cont’d)

Digital Hisham 14 Present State Next State A B C A + B + C T-FF Inputs T A T B T C Counters and Similar Sequential Networks Synchronous Binary Counter BC A TATA BC A TBTB T A = BCT B = C and T C = 1 3-bits counter: Using T Flip-flop (cont’d)

Digital Hisham 15 Counters and Similar Sequential Networks Synchronous Binary Counter TATA QAQA Q’ A TCTC QCQC Q’ C TBTB QBQB Q’ B Pulse 3-bits counter: Using T Flip-flop (cont’d) OR

Digital Hisham 16 Counters and Similar Sequential Networks Synchronous Binary Counter TATA QAQA Q’ A TCTC QCQC Q’ C TBTB QBQB Q’ B Pulse 3-bits counter: Using T Flip-flop (cont’d) 1

Digital Hisham 17 Q Q’ J K CK Counters and Similar Sequential Networks Synchronous Binary Counter 3-bits counter: Using J-K Flip-flop J K Q Q + 01XX01XX XX10XX

Digital Hisham 18 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C J-K flip-flop Inputs J A K A J B K B J C K C 0 X 0 X 1 X 0 X 1 X X 1 0 X X 0 1 X 1 X X 1 X 1 X 0 0 X 1 X X 0 1 X X 1 X 0 X 0 1 X X 1 X 1 X 1 A B C A + B + C J A =0 K A =X J B =0 K B =X J C =1 K C =X

Digital Hisham 19 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C J-K flip-flop Inputs J A K A J B K B J C K C 0 X 0 X 1 X 0 X 1 X X 1 0 X X 0 1 X 1 X X 1 X 1 X 0 0 X 1 X X 0 1 X X 1 X 0 X 0 1 X X 1 X 1 X 1 A B C A + B + C J A =0 K A =X J B =1 K B =X J C =X K C =1

Digital Hisham 20 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter Present State Next State A B C A + B + C J-K flip-flop Inputs J A K A J B K B J C K C 0 X 0 X 1 X 0 X 1 X X 1 0 X X 0 1 X 1 X X 1 X 1 X 0 0 X 1 X X 0 1 X X 1 X 0 X 0 1 X X 1 X 1 X 1 A B C A + B + C J A =0 K A =X J B =X K B =0 J C =1 K C =X

Digital Hisham 21 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter BC A JAJA BC A KAKA 1 X X X X X X X X 1 J A = BCK A = BC

Digital Hisham 22 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter BC A JBJB BC A KBKB X 1 X X 1 J B = CK B = C X11 X X X X

Digital Hisham 23 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter BC A JCJC BC A KCKC 1 XX XX J C = 1K C = X X X X

Digital Hisham 24 Pulse 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter KAKA QAQA Q’ A JAJA KBKB QBQB Q’ B JBJB KCKC QCQC Q’ C JCJC

Digital Hisham 25 Pulse 1 3-bits counter: Using J-K Flip-flop (cont’d) Counters and Similar Sequential Networks Synchronous Binary Counter KAKA QAQA Q’ A JAJA KBKB QBQB Q’ B JBJB KCKC QCQC Q’ C JCJC

Digital Hisham 26 Counters and Similar Sequential Networks Next State Maps Introducing Next State Map Deriving input equation for J-K flip-flop using short cut method

Digital Hisham 27 Introducing Next State Maps Counters and Similar Sequential Networks Next State Maps vs Input Equation Maps Present-Next State Mapping Derive from State Table An intermediate step Flip-Flop specific Can be derived from State Table Next State Maps

Digital Hisham 28 Introducing Next State Maps Counters and Similar Sequential Networks State Table Next State Maps Input Equation Maps Circuit Realization Next State Maps

Digital Hisham 29 Present State Next State A B C A + B + C J-K flip-flop Inputs J A K A J B K B J C K C 0 X 0 X 1 X 0 X 1 X X 1 0 X X 0 1 X 1 X X 1 X 1 X 0 0 X 1 X X 0 1 X X 1 X 0 X 0 1 X X 1 X 1 X 1 Counters and Similar Sequential Networks Use to derive FF input Equation via K-Maps Next State Maps Introducing Next State Maps

Digital Hisham 30 Present State Next State A B C A + B + C J-K flip-flop Inputs J A K A J B K B J C K C 0 X 0 X 1 X 0 X 1 X X 1 0 X X 0 1 X 1 X X 1 X 1 X 0 0 X 1 X X 0 1 X X 1 X 0 X 0 1 X X 1 X 1 X 1 Counters and Similar Sequential Networks Use to derive Next State Maps Introducing Next State Maps Next State Maps

Digital Hisham 31 Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps Present State Next State A B C A + B + C

Digital Hisham BC A A+A+ 1 X X X BC A B+B+ 11 X X X BC A C+C X X X Present State Next State A B C A + B + C Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps 1

Digital Hisham 33 Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps BC A JAJA 1 X X X X J K Q Q + 01XX01XX XX10XX BC A A+A+ 1 X X X BC A KAKA X X X X X J A = B X X 1 K A = B

Digital Hisham 34 Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps J K Q Q + 01XX01XX XX10XX BC A JBJB X X X BC A KBKB 1 X X X X J B = C X X 1 K B = BC A B+B+ 11 X X X 1 X X

Digital Hisham 35 Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps BC A JCJC X X X X X J K Q Q + 01XX01XX XX10XX BC A KCKC X X X X J C = 1 X 1 K C = AB BC A C+C X X X 1 X

Digital Hisham 36 Using J-K Flip-flop 3-bits Prime Number Counter with Next State Maps Counters and Similar Sequential Networks Next State Maps Pulse 1 KAKA QAQA Q’ A JAJA KBKB QBQB Q’ B JBJB KCKC QCQC Q’ C JCJC

Digital Hisham 37 Counters and Similar Sequential Networks Next State Maps SHORTCUT to derive input equations of J-K flip-flop from Next State Maps BC A B+B+ 11 X X X BC A C+C X X X BC A A+A+ 1 X X X 1 Next State Maps

Digital Hisham BC A A+A+ 1 X X X 1 Counters and Similar Sequential Networks Next State Maps SHORTCUT to derive input equations of J-K flip-flop from Next State Maps. J A = BK A = B BC A B+B+ 11 X X X J B = C K B = BC A C+C X X X K B = AB J C = 1

Digital Hisham 39 Counters and Similar Sequential Networks Initial State: Binary Counter Design Only 5 states used 3-bits binary would have 8 state! How does missing states relates to initial state specification?

Digital Hisham 40 Counters and Similar Sequential Networks Initial State: Binary Counter Design Missing states: What if the Binary counter designed has initial/present states of those three? Not a Self-Starting Design Assume that initial state will always be 000.

Digital Hisham 41 Counters and Similar Sequential Networks Initial State: Binary Counter Design A more complete and robust design incorporates all possibilities, i.e. for 3-bits binary: all 8 combinations need to be taken into account.

Digital Hisham 42 Counters and Similar Sequential Networks Initial State: Binary Counter Design Better solution 010 Note: It is not always the case that initial condition of a design has to be 000.

Digital Hisham 43 Counters and Similar Sequential Networks Initial State: Binary Counter Design Better solution (3-bits Prime Number Counter) 010 Present State Next State A B C A + B + C

Digital Hisham 44 Counters and Similar Sequential Networks Initial State: Binary Counter Design Present State Next State A B C A + B + C BC A B+B BC A C+C BC A A+A+ 1 1 Next State Maps Better solution (3-bits Prime Number Counter)

Digital Hisham 45 Counters and Similar Sequential Networks Initial State: Binary Counter Design BC A B+B BC A C+C BC A A+A+ 1 1 J A = BCK A = B+C’ J B = C K B = 1 K C = AB J C = A’B’ Better solution (3-bits Prime Number Counter)

Digital Hisham 46 Pulse 1 KAKA QAQA Q’ A JAJA KBKB QBQB Q’ B JBJB KCKC QCQC Q’ C JCJC Counters and Similar Sequential Networks Initial State: Binary Counter Design Better solution (3-bits Prime Number Counter) B C B C’ C A’ B’ A B

Digital Hisham 47 Counters and Similar Sequential Networks Summary Similar techniques used in counters can be applied for other type of sequential network design which has single pulse input to initiate state changes with other no other external inputs. Approach for simple sequential network design: 1. Derive State (Transition) Table 2. Derive Next State Maps 3. Derive Input Equations from K-Maps 4. Realize the circuits.