Microprocessor-based Systems

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Presentation transcript:

Microprocessor-based Systems Course 5 Special-purpose microprocessors

Special-purpose microprocessors Architecture dedicated for a well-defined scope Types: Microcontrollers a computer system in a single integrated circuit Designed for control applications (enbedded systems) Digital signal processors (DSP) Designed for (high speed) signal processing

Digital signal processing DSP Replace analog signal processing schemes Why digital processing? higher noise immunity (significant difference between logical 0 and 1, hard to influence with noise) higher precision results does not depend on environment changes (temperature, humidity, pressure) or power supply changes allows implementation of complex processing procedures (e.g. filters with many poles) results are repeated in time (no aging of components) changes in the processing procedure does not impose changes in the hardware (usually changes are made only in the program not in the hardware scheme)

Signal processing procedures Filters, convolutions, transforms (Fourier, Laplace, Z) + Y(t)=  f()X(t-)d - where: Y(t)- the output function (signal) X(t)- the input function (signal) f(t)- transformation (processing) function In the digital field the integral is changed into a sum: Y(nT)=  f(kT)*X(nT-kT) k=- where: Y(nT) – the discreet output signal X(nT) – the discreet input signal f(nT) – the discreet transformation function

Architectural characteristics of digital signal processors Multiply and Accumulate Unit - MAC Replaces a classical ALU Multiple data and program buses 2-4 buses Internal memory for program and data RAM, ROM, EPROM memories for data and program Multiple register sets More register banks String oriented addressing modes Automatic indexing, circular buffers Complex multiply and accumulate instructions variations of MAC instructions

MAC – Multiply and Accumulate Unit

Internal scheme of the TMS320C25

Internal scheme of TMS320C25 - RAM – memory blocks: - B0- 256*16 - data and program; - B1- 256*16 – data - B2-32*16 – data - ROM – internal program memory (non-volatile memory) - MAC –multiply and accumulate unit - AR0-7- auxiliary registers - ARP – pointer to auxiliary registers - DP – domain pointer - PC – program counter

TMS320 families and versions 16 bits processors for integers: TMS320C10, TMS320C20 şi TMS320C50 32 bits processors for floating point: TMS320C30 şi TMS320C40 multi-processor architecture for multimedia processing: TMS320C80

Applications with DSPs Electric motors and actuators Intelligent sensors Measuring devices Signal analyzers (ex. Digital Oscilloscope) Medical devices coder/decoders for audio/video signals Modems, communication controllers, routers Musical instruments, Electronic toys, Sound synthesizer, 3D graphical accelerators, image processing and recognition

Limitations of DSPs Limited frequencies for on-line processing the processing time of a signal sample limits the maximum sampling frequency and consequently the maximum frequency of the input signal (half of the sampling frequency) Discreet input and output values limited number of discreet values Discreet processing – not continuous like in the case of analog schemes

Microcontrollers Definition: a (whole) computer system in a single VLSI integrated circuit Components: CPU, ROM memory (for program), RAM memory (for data), interrupt system input/output ports, Timers/Counters Analog to digital converters and digital to analog converters Other interfaces (PWM, WD)

Destination Control and monitoring applications Embedded systems Intelligent sensors Advantages: Low costs Small dimensions Reduced power consumption

The structure of the I 80C31/51 uC

Components of the I8031/51 uC - CPU – Central processing unit executes the instructions - ROM – non-volatile program memory contains the application program and some constant parameters it may be PROM, EPROM or EEPROM, FLASH ; dimension: 0 to 32kB; extendable to 64 KB - RAM –data memory stores variables and the stack the first part – 4 sets of 8 registers – the general purpose registers there is a bit addressable zone – for efficient use in case of logical variables dimension: 128-512 bytes; extendable with an external memory (not recommended) the interrupt system – handles internal and external interrupts/events interrupt sources: 2 external lines, serial cannel, counters/timers clock generator – synchronize the CPU generate the source clock signal for other frequencies (e.g. for the serial cannel)

Components of the I8031/51 uC Input/Output ports – Serial channel – handles input and output digital signals 4 or 6 ports of 8 signals; a signal may be of input, output or bidirectional Serial channel – implements the RS 232 protocol – serial asynchronous character-based, bidirectional communication; optional - I2C –serial bus for external components Timer 0, 1, 2 – set of 2 or 3 timer/counters used for events/impulse counting for delays for frequency generation -DAC – digital to analog converter generates an analog output signal it is optional - CAN – analog to digital converter reads analog signals (8 in this case) WD – watch dog PWM – Pulse Width Modulation

Characteristics of the I8031/51 CPU reduced instruction set instructions executed in a fixed time (ex: 1 us) ROM memory 0-32KB – for program internal and external memory RAM memory 128-256 bytes 4*8 internal registers Special function registers (SFRs) mapped on the data (RAM) memory space

Interfaces Serial channel(s): Input/Output ports Timers/Counters RS232 - mandatory I2C - optional Network interface (ex: CAN) - optional Input/Output ports 4-6 ports * 8 bits (inputs, outputs or bidirectional) Timers/Counters Counting events (impulses) Delay generation Frequency generator Real-time clock PWM – pulse width modulation for the generation of “continuous” signals, using digital ones cheaper and easier to build WD – watch dog for self-control of proper operation Resets itself in case of an error

Working modes Normal Idle mode Power-down mode All components are working (are supplied) Idle mode Only the memory and the clock generator is supplied low consumption Power-down mode Only the memory is supplied (in order to preserve parameters) the power consumption is almost undetectable

Processor variants 256 20 16 16,24 512 ROM/ EPROM RAM Speed MHz Type ROM/ EPROM RAM Speed MHz Interfaces 80C31 80C51 87C51 4k ROM 4k EPROM 128 33 -UART (RS 232), 2 counters, 4 ports 80C32 80C52 87C52 8k ROM 8k EPROM 256 20 3 counters, 4 ports 83C550 87C550 16 2 counters, 4 ports, 8 analog channels on 8 bits, watch-dog 80C552 83C552 87C552 16,24 -UART (RS 232), I2C, 3 counters, 6 ports, 8 analog channels on 10 bits, watch-dog, 2 PWM outputs 80C592 83C592 0-16k ROM16k EPROM 512

Other μC families Intel - I8048, Microchip - PIC 12, PIC16, PIC17 ARM Motorola 68C05