Design of Capacitive Displacement Sensors for Chip Alignment Jose Medina Professor N. McGruer

Outline Introduction Displacement sensors Capacitive sensors FEM simulations Readout circuit Scaled models Experiments Conclusions Introduction: where the project fits within the CHN goals, requirements of the sensor Displacement sensors: review of different sensing techniques Capacitive sensors: what people have done in capacitive sensors, what we are going to do, FEM simulations: theory behind fem, simulate different designs under different assumptions to see how they behave Readout circuit: Scaled models: this is an approach to simplify tests, Experiments Conclusions: from experiments, and design suggestions

Introduction Approach Assemble Alignment Transfer 2 First, how this projects fits into CHN’s goal. Chn is trying to obtain a scalable process flow Here is how the template assisted technique works. Micro/nano fabricated template is exposed to SWNT suspended in a solution. The nanotubes get assembled onto the template under the influence of an electric field A chemically functionalized SWNTs is brought in close contact with the template. And the force are large enough to transfer the nanotubes onto the device substrare. This project aims at designing at sensor for the alignment of template and substrate

Introduction Requirements Accuracy to nm Cost effective Fast Compatible Fabrication Electronics Actuator (nanopositioner) Variable gap Connections to only one side Cost effective: it cant increase too much the fabrication costs Reasonably fast: the goal would be to connect the sensor to a controller to close the loop. If the sensor is slow the controller may become instable. Compatible -sensor on the chips must be compatible with the template/substrate fabrication flow -the readout circuit must be compatible with the nanoaligner

Displacement Sensors + + +/+ + - /+ + - -- -/+ Criteria Probe-based Optical Thermal Capacitive Accuracy + + +/+ + Range - /+ Speed + - Fabrication -- Electronics integration Parasitic forces -/+ Power consumption Find information about thermal… For all these reason, capacitive was selected for the sensor…. A. A. Kuijpers, ‘Micromachined Capacitive Ling-Range Displacement Sensor for Nano-positioning of Microactuator Systems’, PhD thesis, Universiteit Twente

Capacitive sensors Capacitive sensor literature Widely used Drug delivery, temperature/humidity sensors, automotive, positioners No sensor moves in two dimensions Capacitive sensors are pretty common in sensor literature Humidity capacitor: Cx=Co(1+Sd H) where Cx=sensor capacitance, Co=offset capacitance, Sd=dielectric sensitivity of sensor, H=relative humidity for detection ‘Modeling and Optimization of a Fast Response Capacitive Humidity Sensor’, Tetelin ‘Perspectives on MEMS in Bioengineering: A Novel Capacitive Position Microsensor’, Pedrocci

Capacitive sensors Electrodes on substrate and template

Capacitive sensor C=Q/V=f(geometry) Chip alignment: connections only on one electrode ~

Capacitive sensor Complete system Equivalent circuit Ask them to pay attention at electrodes number!! They’ll have to remember the numbers

Capacitive sensor Cantor set geometry First level Second level Third level This geometry would work pretty well with the 2 electrode configuration. However, since the bottom electrodes are not connected, for larger gaps they don’t work as an unified larger electrodes. Therefore it does not give a good accuracy for long gaps as it was expected

Capacitive sensor Central fractal geometry First level Second level Third level This geometry is a good tradeoff between the optimal geometry for long gap and short gap.

FEM simulations Numerical method Due to the principle of superposition, the potentials of electrodes 2 and 4 do not matter. If R2 and R4 are low, electrodes 2 and 4 act like shields by intercepting most of the electric flux between 1 and 3. However, with high R2 and R4, these electrodes increase C13. W1=q1Vab=q1q2/(4 pi epsilon R) Using gauss’ law div(D)=ro, and divergence theorem A set of ncap linear independent vectors containing the squares voltage differences Uij^2 has to be created ensuring that the determinant of the resulting matrix is non zero A. Hiekes, SIEMENS; Baxter, Capacitive Sensors

FEM simulations Modeling scenarios Closed system Open boundary Natural boundary condition Trefftz domain Infinite elements 1)Three conductors, closed system: assumes filed restricted to a determined area Open boundary: field not restricted, extends indefinitely 2)Open boundary left as natural boundary condition 3)Trefftz domain models open boundary: trefftz source nodes located within the finite element domain, but not attached to the infinite element model 4)Infinity modeled by infinite elements ANSYS, Inc

FEM simulations

FEM Simulations Models Doped Si substrates Glass top substrate Glass bottom substrate

Readout Circuit Converter Voltage applied at capacitor transforms a signal to another more convenient Voltage applied at capacitor To measure the impedance of a capacitor, an excitation is applied to one of the terminals. This produces a current that is… Converter: electrical circuit aimed at transforming an electrical signal to another more convenient electrical signal.

Readout circuit Alignment precision and converter performance Circuits Oscillator AC-bridge Transimpedance amplifier Switched-capacitor Sigma-Delta modulator Because the purpose of a capacitance to voltage converter is to detect changes in capacitance, the performance is evaluated by the circuit’s ability to read the minimum possible change in capacitance, which is limited by the circuit’s noise. Circuit’s noise waveform=vn-rms=sqrt(mean(vn^2)) At the beginning of the project we meant to build a circuit… Minimum achievable capacitance based on the thermal noise limit. Capacitive bridge (Ac-bridge): based on the well-known Wheastone bridge. It’s highly sensitive to parasitics. Transimpedance:vo=2pi f Vs R f C = sqrt(fresonance*GBW)= The sc scheme is suitable when parasitics are large due to non-monolithic integration

Readout circuit Transimpedance amplifier Synchronous demodulator Low pass filter Basically a current to voltage converter, i.e. a circuit that converts a…

Readout circuit Switched-Capacitor Amplifier φ2 φ1

Readout circuit Sigma-Delta modulator Cap-to-digital converter based on SC modulator Sigma delta modulators convert an anlog signal to digital . SD modulators are based on the integration (S) of a delta modulator. A delta modulator is based on quantizing the change in signal, instead of the signal. The input signal x(t) is substracted from the average of the output y(t)

Scaled Models Scaled models How do and C scale with geometry?

Scaled Models Theoretical accuracy Scaled models The equation for xmin says width doesn’t matter and that the number of strips should be as high as possible. Therefore according to this equation the fractal thing is pointless, the design should be just as many small groups as possible. However this equation fails at long gaps when fringing field is dominant. Following the approach infered from the equation would give very high accuracy for short gaps, but for long gaps the accuracy would be pretty bad. That’s whym regardless what the equation says, we should use groups with larger width

Experiments Two PCBs Large w/g ratio Small w/g ratio Max accuracy? Geometry performance? Short w/d ratio Top board Bottom board Central group (mm) Width 0.03’’ 0.762 0.06’’ 1.524 Spacing traces Spacing subgroups 0.09’’ 2.286 0.12’’ 3.048 Lateral group 0.15’’ 3.81 0.3’’ 7.62 Spacing groups 0.45’’ 11.43 0.54’’ 13.716 Large w/d ratio Top board Bottom board Trace width 0.12’’ 3.048 cm 0.25’’ 6.350 cm Separation traces 0.47’’ 11.938 cm Separation groups 0.36’’ 9.144 cm

Experiments Setup Stage PCBs Readout circuit Connectors, wires Computer

Experiments Results: large feature board Experiments greater capacitance Sim and experiments same profile Experiments different results Accuracy 5fF (specs 4fF) 0.1mm (calculations 2 μm) Sim/exp results further for long displacements

Experiments Results: small feature board Cap increases with displacement! Similar profiles Good performance at short gap Min largest gap 3mm (u=0.762 mm) 1 unit = 0.76 mm = 0.03’’ Capacitance increasing could lead to instability if there is a controller. So gaps longer than 3 mm should be avoided. This means that ratio g/w should be less than 1, or 0.5 to be safe

Conclusions Simulations DC capacitance Sim/exp further for large gaps Ground close than at infinite 5 electrodes + stage Sim/exp further for large gaps Cap to stage dominant Variations between experiments Plates not parallel, gap varies Increase cap with displacement C13 and C23 decrease C12 dominant, board ‘perturbs’ E

Conclusions Sensor design suggestion Central fractal geometry Width depends upon min/max gap Min: g/w < 1/3 for last level to take over, ideally <1/10 Max: g/w < 1 to avoid instabilities Capacitor width w, #levels u Chip 15x15 mm sq  sensor 0.5x0.5 mm sq

Conclusions Min feature size 1 um 0.1 um w strip-group 1 1-3 um 100-300 nm w strip-group 2 1-15 um 0.1-1.5 um 1- 291 um w strip-group 3 5-75 um 0.5-7.5 um 0.1 – 1.5 mm w strip-group 4 25-375 um 2.5-37.5 um w strip-group 5 0.125-1.875 mm 12.5-187.5 um w strip-group 6 0.0625-0.9375 mm Max gap 25 um 0.1 mm 1 mm Min gap 20 nm 10 nm #sets n 5 7 9 49+2 Xmin scaled 240 nm 34 nm 26 nm 5.8 nm Xmin calculated 4.8 nm 0.68 nm 0.53 nm 0.11 nm W level 2 = 3*n+3(n-1) = 6n-3 = (n=49) 291 For the fractal approach the accuracy is more linear with gap, i.e. while the gap is decreasing more groups take control and n increases, increasing therefore the accuracy. If only two groups are used, as in the last case in the right, the big group has to do it all until the gap is in the order of 1 um. Only at that gap does the last group take over and n increases.

Thank you for you attention Acknowledgments Advisor: Professor McGruer Professors: Adams, Busnaina, Muftu, Papageorgious, Sun Students: Prashanth, Juan Carlos Aceros, Peter Ryan, Andy Pamp, Siva, Harris Mussolis

Capacitive sensors Definition Capacitance Vs Conductor a e- + + + + + + + + + + + + e- + + + + + + + + + + + + + + + + + + + + + + + + + + + + Vs - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Conductor b

FEM Simulations Convergence When plates close, electric field gradient greater, so larger error if short in nodes

Switched-Capacitor amplifier Sampling phase (φ1 on, φ2 off) Charge-transfer phase (φ1 off, φ2 on) φ2 φ1

Correlated Double Sampling Processing phase Sampling phase Autozeroing is based on samping the unwanted quantity and then subtracting it from the instantaneous value of the contaminated signal It is equivalent to subtracting from the time-varying noise a recent sample of the same noise. Two phases: sampling phase noise sampled and stored, processing phase the noise free stage is available for operation

Simulations switched-capacitors Time (ms) V (volts)

Bandwidth switched-capacitors