1 Distribution-Compensable Jitter Generator for Communication Test Presenter ： Pin-Chong Chen Advisor ： Tsung-Che Huang 2009/09/21 Y.-H. Chou, T.-H. Wu,

Slides:

Advertisements

Similar presentations

Digital Communication

Advertisements

Managerial Decision Making and Problem Solving Computer Lab Notes 1.

Fig. 4-1, p Fig. 4-2, p. 109 Fig. 4-3, p. 110.

A G3-PLC Simulator for Access Networks Speaker : Jiun-Ru Li Advisor : Dr. Kai-Wei Ke 2014/11/18.

1 Advancing Supercomputer Performance Through Interconnection Topology Synthesis Yi Zhu, Michael Taylor, Scott B. Baden and Chung-Kuan Cheng Department.

P.464. Table 13-1, p.465 Fig. 13-1, p.466 Fig. 13-2, p.467.

Module F: Simulation. Introduction What: Simulation Where: To duplicate the features, appearance, and characteristics of a real system Why: To estimate.

Fig. 11-1, p p. 360 Fig. 11-2, p. 361 Fig. 11-3, p. 361.

Department of electrical and computer engineering An Equalization Technique for High Rate OFDM Systems Mehdi Basiri.

Department of Electrical Engineering National Chung Cheng University, Taiwan IEEE ICHQP 10, 2002, Rio de Janeiro NCCU Gary W. Chang Paulo F. Ribeiro Department.

Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources Lerong Cheng 1, Jinjun Xiong 2, and Prof. Lei He 1 1 EE Department, UCLA.

Simulation Modeling and Analysis

Dec. 19, 2005ATS05: Agrawal and Doshi1 Concurrent Test Generation Auburn University, Department of Electrical and Computer Engineering Auburn, AL 36849,

Concurrent Test Generation Auburn University, Department of Electrical and Computer Engineering Auburn, AL 36849, USA Vishwani D. Agrawal Alok S. Doshi.

Table 6-1, p Fig. 6-1, p. 162 p. 163 Fig. 6-2, p. 164.

Research Methodology EPH 7112 LECTURE 6: RESEARCH PLANNING.

Computational statistics, course introduction Course contents  Monte Carlo Methods  Random number generation  Simulation methodology  Bootstrap  Markov.

NORM BASED APPROACHES FOR AUTOMATIC TUNING OF MODEL BASED PREDICTIVE CONTROL Pastora Vega, Mario Francisco, Eladio Sanz University of Salamanca – Spain.

Simulation of Communication Systems Wireless Systems Instructional Design.

L i a b l eh kC o m p u t i n gL a b o r a t o r y Performance Yield-Driven Task Allocation and Scheduling for MPSoCs under Process Variation Presenter:

Jan 6-10th, 2007VLSI Design A Reduced Complexity Algorithm for Minimizing N-Detect Tests Kalyana R. Kantipudi Vishwani D. Agrawal Department of Electrical.

On the Task Assignment Problem : Two New Efficient Heuristic Algorithms.

Analysis and Avoidance of Cross-talk in on-chip buses Chunjie Duan Ericsson Wireless Communications Anup Tirumala Jasmine Networks Sunil P Khatri University.

46th SIAA Structures, Dynamics and Materials Conference Austin, TX, April 18-21, 2005 Application of the Generalized Conditional Expectation Method for.

1 Assessment of Imprecise Reliability Using Efficient Probabilistic Reanalysis Farizal Efstratios Nikolaidis SAE 2007 World Congress.

1 SOUTHERN TAIWAN UNIVERSITY ELECTRICAL ENGINEERING DEPARTMENT Gain Scheduler Middleware: A Methodology to Enable Existing Controllers for Networked Control.

Distributed Quality-of-Service Routing of Best Constrained Shortest Paths. Abdelhamid MELLOUK, Said HOCEINI, Farid BAGUENINE, Mustapha CHEURFA Computers.

1 Miodrag Bolic ARCHITECTURES FOR EFFICIENT IMPLEMENTATION OF PARTICLE FILTERS Department of Electrical and Computer Engineering Stony Brook University.

SoC Design Lab, Electronic Engineering, National Changhua University of Education, Taiwan, R.O.C /11/30 Presenter: Pin-Chong Chen Advisor: Tsung-Che.

Chapter 14 Monte Carlo Simulation Introduction Find several parameters Parameter follow the specific probability distribution Generate parameter.

Probabilistic Mechanism Analysis. Outline Uncertainty in mechanisms Why consider uncertainty Basics of uncertainty Probabilistic mechanism analysis Examples.

Chapter 10 Introduction to Simulation Modeling Monte Carlo Simulation.

Providing Delay Guarantees in Bluetooth Rachid Ait Yaiz and Geert Heijenk International Conference on Distributed Computing Systems Workshops (ICDCSW’03)

1 An FPGA-Based Novel Digital PWM Control Scheme for BLDC Motor Drives 學生 : 林哲偉學號 :M 指導教授 : 龔應時 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL.

Maximum Network Lifetime in Wireless Sensor Networks with Adjustable Sensing Ranges Cardei, M.; Jie Wu; Mingming Lu; Pervaiz, M.O.; Wireless And Mobile.

Accelerating Statistical Static Timing Analysis Using Graphics Processing Units Kanupriya Gulati and Sunil P. Khatri Department of ECE, Texas A&M University,

Projekt „ESSNBS“ Niš, November 4 th – 7 th, DAAD Design and Simulation of Multiplexer Cell Resistant to Side Channel Attacks.

Presented by: Meysam rahimi

Low-Power H.264 Video Compression Architecture for Mobile Communication Student: Tai-Jung Huang Advisor: Jar-Ferr Yang Teacher: Jenn-Jier Lien.

The Application of The Improved Hybrid Ant Colony Algorithm in Vehicle Routing Optimization Problem International Conference on Future Computer and Communication,

1 A ROM-less DDFS Using A Nonlinear DAC With An Error Compensation Current Array Chua-Chin Wang, Senior Member, IEEE, Chia-Hao Hsu, Student Member, IEEE,

-1- Statistical Analysis and Modeling for Error Composition in Approximate Computation Circuits Wei-Ting Jonas Chan 1, Andrew B. Kahng 1, Seokhyeong.

Validating a Random Number Generator Based on: A Test of Randomness Based on the Consecutive Distance Between Random Number Pairs By: Matthew J. Duggan,

Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-bit Parallel Adder Babu, H. M. H. Chowdhury, A.R, “Design of a reversible binary.

Radhamanjari Samanta *, Soumyendu Raha * and Adil I. Erzin # * Supercomputer Education and Research Centre, Indian Institute of Science, Bangalore, India.

On the Assumption of Normality in Statistical Static Timing Analysis Halim Damerdji, Ali Dasdan, Santanu Kolay February 28, 2005 PrimeTime Synopsys, Inc.

QuickYield: An Efficient Global-Search Based Parametric Yield Estimation with Performance Constraints Fang Gong 1, Hao Yu 2, Yiyu Shi 1, Daesoo Kim 1,

Mixture Kalman Filters by Rong Chen & Jun Liu Presented by Yusong Miao Dec. 10, 2003.

Reducing MCMC Computational Cost With a Two Layered Bayesian Approach

Pseudo Randomness (in digital system) PRESENTED BY GROUP 8 SHU-YU HUANG, FONG-JHENG LIN

Heterogeneous redundancy optimization for multi-state series-parallel systems subject to common cause failures Chun-yang Li, Xun Chen, Xiao-shan Yi, Jun-youg.

Chapter 8 – Tree-based Anti-Collision Protocols for RFID tags

1 An Analytical Model for the Dimensioning of a GPRS/EDGE Network with a Capacity Constraint on a Group of Cells r , r , r Nogueira,

MAT 4830 Mathematical Modeling 04 Monte Carlo Integrations

A Load-Balanced Guiding Navigation Protocol in Wireless Sensor Networks Wen-Tsuen Chen Department of Computer Science National Tsing Hua University Po-Yu.

Differential Distinguishing Attack on the Shannon Stream Cipher Based on Fault Analysis Mehdi Hassanzadeh University of Bergen Selmer Center, Norway

EMIS 7300 SYSTEMS ANALYSIS METHODS FALL 2005 Dr. John Lipp Copyright © 2005 Dr. John Lipp.

A stochastic scheduling algorithm for precedence constrained tasks on Grid Future Generation Computer Systems (2011) Xiaoyong Tang, Kenli Li, Guiping Liao,

Genetic algorithms for task scheduling problem J. Parallel Distrib. Comput. (2010) Fatma A. Omara, Mona M. Arafa 2016/3/111 Shang-Chi Wu.

Optimal Relay Placement for Indoor Sensor Networks Cuiyao Xue †, Yanmin Zhu †, Lei Ni †, Minglu Li †, Bo Li ‡ † Shanghai Jiao Tong University ‡ HK University.

Review on Test-Based Approach of Software Reliability November 22 nd, 2010 Nuclear I&C and Information Engineering LabKAIST Bo Gyung Kim.

Neural network based hybrid computing model for wind speed prediction K. Gnana Sheela, S.N. Deepa Neurocomputing Volume 122, 25 December 2013, Pages 425–429.

Time-to-Fa ilure Tree KEIHANEH KIA – 94/1/24 1 Alireza Ejlali  Sharif University of Technology  Tehran. Seyyed Ghasem Miremadi  Sharif University.

Generalization Performance of Exchange Monte Carlo Method for Normal Mixture Models Kenji Nagata, Sumio Watanabe Tokyo Institute of Technology.

An FPGA Implementation of a Brushless DC Motor Speed Controller

Speaker : Che-Wei Chang

Applications of Distributed Arithmetic to Digital Signal Processing:

Chapter 14 Monte Carlo Simulation

Presentation transcript:

1 Distribution-Compensable Jitter Generator for Communication Test Presenter ： Pin-Chong Chen Advisor ： Tsung-Che Huang 2009/09/21 Y.-H. Chou, T.-H. Wu, P.-C. Chan, and T.-C. Huang, “Distribution-Compensable Jitter Generator for Communication Test,” 20th VLSI Design/ CAD, Aug

2 Outline Introduction Programmable Delay Line (PDL) Random Number Generator (RNG)  Normal Distribution RNG  Uniform Distribution RNG Distribution-Compensable Methodology Experiment Results Conclusions

3 Introduction In high-speed computer and communication systems, timing jitter is one of the most critical parameters. Jitter testing is becoming indispensable. Conventional Jitter Generator is executed by expensive external testers or instruments. Communication test :(1)Waveform Analyses, (2)JG/JM and (3)bit error rat test.

4 Basic Methodology Based on the noise/jitter generation structure. The non-linearity and self-jitter of the converter have skew. Fig. 1. A programmable noise/jitter generator.

5 Benchmark DTC’s (1) Fig. 2. A programmable jitter generator. Fig. 3. Adopted DCDL.

6 Benchmark DTC’s (2) Fig. 4. Adopted VCDL as a fine-tuned delayline.

7 Monte Carlo simulation results Fig. 5. Transfer function of a 5-bit DTC

8 Box-Muller &table-lookup methods Box-Muller table-lookup methods Fig. 6. Typical table lookup methods.

9 Ziggurat algorithm Fig. 7. (a) Ziggurat algorithm and (b) 7-layer Ziggurat diagram.

10 Efficient RNG (1) (a) shows the uniform distribution u1,u2. (b) show the sum of u1 and u2. (c) show the minimum (min) of u1 and u2 (d) show the maximum (max) of u1 and u2 Fig. 8. Uniform and composed distributions.

11 Efficient RNG (2) Fig. 9. The ith H- and V-trapezoid pdf’s. (1)

12 Simulations of RNGs Fig.11. Examples of the V-trapezoid RNGs with the simulation results.

13 Jitter Distribution Compensation(1) Distribution-compensable methodology RNG (f1(x))DTCf2(x)chi-square test Compensation

14 Jitter Distribution Compensation(2) Fig. 12 Compensating example

15 Examples

16 CONCLUSION In this paper a programmable, fast and area- efficient trapezoidal PWL RNG is developed. The speedup and area reduction make it possible to build into SoCs/NoCs.

17 Thanks for your attention.