GEM detector development at VECC Anand Dubey

2-GEM detector tested with source symmetric mode of biasing scheme, (i.e. same voltage across both the GEMS)

ΔVgem~415 Δ Vgem~421 Δ Vgem~425Δ Vgem~427 Δ Vgem~431 Δ Vgem~434 Δ Vgem~442 Δ Vgem~441 Δ Vgem~448 V~414.6V~414.6 Δ Vgem~454 Δ Vgem~451 Voltage Scan (Fe-55) Conventional electronics

Variation of pulse height with Vgem Pulse height vs. input charge

Variation of Detector Gain with GEM Voltage

Energy Resolution

Schematic of Chamber assembly (3-GEM) GEMS Drift plane (inner side copper plated) 12 x cm 12 cm x 10 mm -- perspex Readout PCB GEM foils Obtained from CERN One triple GEM One double GEM assembled

The readout PCB 256 Pads with staggered layout each pad 8 mm x 3.5 mm GEM params: Area: 10cm x 10cm Double GEM: Drift gap: 7mm Inductive gap: 1.5mm Transfer gap: 1mm Triple GEM: Drift gap: 6.5 mm Inductive gap = 1.5mm Transfer gap = 1mm

BEAM sept’08

Beam Region fired In FEB, every alternate channel was missing, i.e. we could not read out alternate channels BEAM SPOT 3-GEM 2-GEM High intensity run

Questions remaining from last test beam Absolute efficiency and HV dependence Beam intensity dependence Absolute gain estimate Uniformity over small zone New questions: Pad multiplicity/cluster size Position resolution Required dynamic range before saturation Induction gap (does it increase cluster size?)

Input from simulation (??).. What would be the pad size ( at least first few stations?) Which cluster size is optimal? How does the cluster-size affect cell multiplicity? Cluster-size vs position resolution?

2.0 mm 1.6mm x 16mm 3.5mm x 8mm Det 1Det 2 Triple GEMs with one more layer (1mm)

GEM2 GEM1 Test beam setup’09

Fe-55 spectra with full readout DeltaV (GEM) ADC

Summary of data taken: 2 ROCs connected to one half of each detector small cell size in det1 and large cell size in det 2 one day data: Both large pad sizes Both the detectors moved in X and Y (Beam spot moved and went away) Aux signals: 2 days data where Aux from different detectors can be correlated (can be used for position resolution) One day data for good AUX (crucial for eff) Trigger data: One run for 10 minutes

actual pad readout plane on-line beam profile on this readout plane All channels connected!!

Time difference between aux and GEM ROC Offset + Drift spread ?? Procedure: Select fired GEM cells in nsec after last Aux. All Aux channels: eff:10% Aux-Channel=2 (4 fold) eff = 71%

BEAM SPOT ON TWO CHAMBERS Cell size: 1.6mm x 16mm Cell size: 3.5mm x 8mm

MIP distribution of hit cell Correlation between GEM1 and GEM2 Position of spots (cell units) from 2 detectors Shown (well-correlated)

ADC distribution of main cell and variation with HV 4 fold increase in ADC for a deltaV(GEM) increase by 50V

PAD multiplicity Two back to back detectors similar pad multiplicity.. No effect of increased induction gap? (Last day’s data, det2 had low eff, went bad after 3500V) Depends on beam profile, needs correlating with beam tracker

Efficiency of detector 1 (large pad size) Only aux2 taken, all aux gives low eff (23%). Time window: nsec Detector2 (5 th sept data) goes upto 71% Needs 5-fold coincidence Above>3600V, nXYTER saturates, needs larger dyn range

Further analysis and issues: Correlation with beam counter for position resolution. Correlation will provide better idea about cluster-size Cell to cell variation Absolute gain study from Fe-55 data Triggered data Puzzle: Low efficiency (Gain high, large eff expected, better beam defn? Wider (and grass) time spectra Plan: Efficiency at lab with Fe-55 and cosmic ray Test cross-talk if any Build rectangular (hex) pads 30cm x 30cm prototype Problem with 2-hour beam time??

Presently, the pad size requirement for nearer stations is around 6/7 sq.mm. With this size a zone of 256 pads occupy an area of 1914 sq.mm (87 x 22 mm ). Since it is impossible to put a 2-chip FEB over this area horizontally, the only option left is to populate the FEBs vertically. Assuming one can design a 256 ch FEB with a height around 100mm and width around 80mm, the combined chamber + FEB thicknes will be around cms. Since the gaps between absorbers are limited, a slat type chamber construction is suitable to reduce the total required thickness of chamber planes ( a minimum of two staggered planes of slats are required to eliminate the boundary dead spaces). ROC cards are to be stacked on the sides of the stacking stations away from the main tracking area. Mounting of chambers

A)Back to back B) same side FEB Structural support Chamber frames Active chamber area FEB How do we mount the chambers??

Option A) has more rigidity but takes more profile Option B) has less profile but needs better structural engineering and requires narrower FEB boards. Minimum profile required for option B) is ~ 22-25cms.

Summary and outlook 2 triple GEM chambers tested with proton beam and source using full readout system Efficiency goes maximum upto 75% based on 2-fold Aux signal (no acceptance correction) Gain and pad multiplicity goes up with HV Position resolution and cluster-size will be obtained after correlating the beam tracker. 1. Detailed tests in lab with source and cosmic 2. Long term stability test Pad-size should be finalized from simulation 30cm x 30cm chamber for next test beam Discussion started on mounting of FEBs and chamber in modular structure.

Readout board developments at VECC for GEM readout Madhu Sudan Dey Sushanta Pal

27 May 2016 BLOCK DIAGRAM OF FEE BOARD UNDER DEVELOPMENT AT V.E.C.C. 30 FEEB Development At VEC

27 May 2016 FEE board is a hybrid PCB board (Board on chip).  nXYTER : Mixed Signal ASIC Chip. nXYTER : Mixed Signal ASIC Chip.  ADC : AD9228 ( 12 bit, 40/65 MSPS ). ADC : AD9228 ( 12 bit, 40/65 MSPS ).  SAMTEC 300 SAMTEC 300 Issues associated with PCB Layout Design : Pad sizes and pitch, dimensions of chip die are critical. To satisfy these constraints, complex routing is needed. Bonding of pads is also complex. 256 Channels : :size 220mm x 160mm The critical layout part where wire bonding with the pads of the chip with the pads on PCB are shown in the figure. Minimum conductor spacing & Minimum conductor width along with wire bonding demand the specialized fabricators 31 PCB layout of FEE Board fi This is done at VEC Dimensions Reqd :size 99mm x 65mm

27 May 2016 Wire Bonding Scheme Representative Diagram

27 May 2016 n-XYTER FEB: Chip integration –Chip-In-Board solution avoids space eating vias –allows pitch adaptation: – 50,7 µm on chip to PCB side 101,4 µm on two levels A simple hybrid PCB with signal fan-in, ADC and interconnect to SysCore DAQ chain Ongoing prototyping at VEC Need modifications: Inner layer contact edges becomes not proper – Wire bonding problem! Off set of pads observed Several vedors are in contact to solve the problem.

Fabrication of ReadOut Controller board Plan: Feasibility test with Indian industry 2-ordered, to be available by end of October Procedure ON: 30 FEBs 25 ROCs