Cyclic Redundancy Check CRC Chapter 4

10.2 CYCLIC CODES Cyclic codes are special linear block codes with one extra property. In a cyclic code, if a codeword is cyclically shifted (rotated), the result is another codeword. For example, if is a codeword and we cyclically left-shift, then is also a codeword.

In this case, if we call the bits in the first word a 0 to a 6, and the bits in the second word b 0 to b 6, we can shift the bits by using the following : b 1 = a 0 b 2 = a 1 b 3 = a 2 b 4 = a 3 b 5 = a 4 b 6 = a 5 b 0 = a 6 In the rightmost equation, the last bit of the first word is wrapped around and becomes the first bit of the second word.

10.4 Cyclic Redundancy Check We can create cyclic codes to correct errors. In this section, we simply discuss a subset of cyclic codes called the cyclic redundancy check (CRC), which is used in networks such as LANs and WANs.

The third and most powerful of the redundancy checking techniques is the cyclic redundancy check (CRC). Unlike VRC and LRC, which are based on addition, CRC is based on binary division. In CRC, instead of adding bits together to achieve a desired parity, a sequence of redundant bits, called the CRC or the CRC remainder, is appended to the end of a data unit so that the resulting data unit becomes exactly divisible by a second, predetermined binary number.

At its destination, the incoming data unit is divided by the same number. If at this step there is no remainder, the data unit is assumed to be intact and is therefore accepted. A remainder indicates that the data unit has been damaged in transit and therefore must be rejected. The redundancy bits used by CRC are derived by dividing the data unit by a predetermined divisor; the remainder is the CRC. To be valid, a CRC must have two qualities: it must have exactly one less bit than the divisor, and appending it to the end of the data string must make the resulting bit sequence exactly divisible by the divisor. Both the theory and the application of CRC error detection are straightforward. The only completely is in deriving the CRC. In order to clarify this process, we will start with an overview and add complexity as we go. Figure 9.8 provides an outline of the three basic steps.

First, a string of n 0s is appended to the data unit. The number n is one less than the number of bits in the predetermined divisor, which is n + 1 bits. Second, the newly elongated data unit is divided by the divisor using a process called binary division. The remainder resulting from this division is the CRC. Third, the CRC of n bits derived in step 2 replaces the appended 0s at the end of the data unit. Note that the CRC may consist of all 0S.

Fourth, The data unit arrives at the receiver data first, followed by the CRC. The receiver treats the whole string as a unit and divides it by the same divisor that was used to find the CRC remainder. Fifth, If the string arrives without error, the CRC checker yields a remainder of zero and the data unit passes. If the string has been changed in transit, the division yields a non- zero remainder and the data unit does not pass.

Table : A CRC code with C(7, 4) 10.9

CRC Encoder In the encoder, the dataword has k bits(4 here), the code word has n bits (7 here). The size of the dataword is augmented by adding n-k (3 here) 0s to the right hand side of the word. The n bit result is fed to the generator. The generator uses a divisor of a size n-k+1 (4 here) The generator divides the augmented dataword by the divisor (modulo2or XOR operation) The quotient of the divisor is discarded; the remainder (r2r1r0) is appended to the dataword to create codeword

CRC decoder The function of decoder is same as generator The decoder receives the possibly corrupted codeword. A copy of all n bits is fed to the checker which is replica of generator The remainder produced by the checker is a syndrome of n – k (3 here) bits, which is fed to the decision logic analyzer. The analyzer has a simple function. If the syndrome bits are all 0s, the 4 leftmost bits of the codeword are accepted as the dataword (interpreted as no error); otherwise, the 4 bits are discarded (error).

CRC

10.13 Figure : CRC encoder and decoder

CRC Calculation using binary division Example 1

Example 2

10.16 Figure : Division in the CRC decoder for two cases

10.17 Hardware Implementation One of the advantages of a cyclic code is that the encoder and decoder can easily and cheaply be implemented in hardware by using a handful of electronic devices. Also, a hardware implementation increases the rate of check bit and syndrome bit calculation. we are showing here step by step process.

10.18 Figure Hand-wired design of the divisor in CRC Lets first understand divisor: 1.The divisor is repeatedly XORed with part of the dividend 2.The divisor has n-k+1 bits which either are predefined or all are 0s 3.A close look shows that only n-k bits of the divisor is needed in XOR operation. 4.Using above points, we can make a fixed hardwired divisor that can be used for a cyclic code, if we know the pattern of the divisor

Remainder

10.20 Figure : Simulation of division in CRC encoder

10.21 Figure : CRC encoding design using shift register

10.22 Figure: General design of encoder and decoder of CRC

Polynomials A better way to understand cyclic codes and how they can be analyzed is to represent them as polynomials. A pattern of 0s and 1s can be represented as a polynomial with coefficients of 0 and 10. The power of each term shows the position of the bit; the coefficient shows the value of the bit. Figure given shows a binary pattern and its polynomial representation.

Algebraic representation of binary code words For the purpose of analysis, the binary codes are represented using algebraic polynomials. In a polynomial of variable x, coefficient of the powers of x are the bits of the code, the most significant bit being the coefficient of the highest power of x. The data word can be represent by a polynomial M(x)

M(x) = x 8 + x 7 + x 5 + x 3 + x M(x) = 1x 8 + 1x 7 + 0x 6 + 1x 5 + 0x 4 + 1x 3 + 0x 2 + 1x 1 + 0x 0 Note that nine bit data word is represented by an algebraic polynomial of eight degree. Degree of the polynomial is always less than word length by one because polynomial end with x 0.

The CRC generator (the divisor) is most often represented not as a string of 1s and 0s, but as an algebraic polynomial. the polynomial format is useful for two reasons: it is short, and it can be used to prove the concept mathematically

10.27 Figure : A polynomial to represent a binary word

A polynomial representing a divisor

Polynomial and Divisor

A polynomial should be selected to have at least the following properties : It should not be divisible by x. It should be divisible by (x+1). The first condition guarantees that all burst errors of a length equal to the degree of the polynomial are detected. The second condition guarantees that all burst errors affecting an odd number of bits are detected

Example It is obvious that we cannot choose x (binary 10) or x 2 + x (binary 110) as the polynomial because both are divisible by x. However, we can choose x + 1 (binary 11) because it is not divisible by x, but it divisible by x + 1. We can also choose x (binary 101) because it is divisible by x + 1 (binary division). The standard polynomials used by popular protocols for CRC generation are shown in Figure The numbers 12, 16 and 32 refer to the size of the CRC remainder. The CRC divisors are 13, 17, and 33 bits, respectively.

Standard polynomials NamePolynomialApplication CRC-8x 8 + x 2 + x + 1ATM header CRC-10x 10 + x 9 + x 5 + x 4 + x 2 + 1ATM AAL ITU-16x 16 + x 12 + x 5 + 1HDLC ITU-32 x 32 + x 26 + x 23 + x 22 + x 16 + x 12 + x 11 + x 10 + x 8 + x 7 + x 5 + x 4 + x 2 + x + 1 LANs

Example : A CRC code with C(7, 4) 10.33

Example : If the transmitted code word is and the received code word is , what is the error word? Express these as polynomials. Solution : Received word (T’) Transmitted word (T) Error word(E)