Chapter 3 (part 2) Basic Logic Gates 1.

Slides:



Advertisements
Similar presentations
Chapter 3 Basic Logic Gates 1.
Advertisements

Logic Gates.
Logic Gates.
Chapter 3 Logic Gates.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals with PLD Programming.
Programmable Logic Controllers.
Chapter 3 (part 1) Basic Logic Gates 1.
EET 1131 Unit 3 Basic Logic Gates
Exclusive-OR and Exclusive-NOR Gates
Exclusive-OR and Exclusive-NOR Gates
topics Logic gates Gates types Universal gates
Chapter 3 Basic Logic Gates 1.
Boolean Algebra and Combinational Logic
Chapter 3 Basic Logic Gates
Digital Electronics Dan Simon Cleveland State University ESC 120 Revised December 30, 2010.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Lab 04 :Serial Data Control Systems : Slide 2 Slide 3 Slide 4 NOR Gate: NAND Gate: NOR / NAND Alternate Symbols: Slide 5 XOR and XNOR Gate: Serial Data.
In this module you will learn: What the various logic gates do. How to represent logic gates on a circuit diagram. The truth tables for the logic gates.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Fundamentals Tenth Edition Floyd.
Chapter 2 Logic Functions and Gates. 2 Basic Logic Functions The three basic logic functions are: –AND –OR –NOT.
Chapter 33 Basic Logic Gates. 2 Objectives –After completing this chapter, the student should be able to: Identify and explain the function of the basic.
Chapter 3 Basic Logic Gates William Kleitz Digital Electronics with VHDL, Quartus® II Version Copyright ©2006 by Pearson Education, Inc. Upper Saddle River,
Sneha.  Gates Gates  Characteristics of gates Characteristics of gates  Basic Gates Basic Gates  AND Gate AND Gate  OR gate OR gate  NOT gate NOT.
Exclusive OR Gate. Logically, the exclusive OR (XOR) operation can be seen as either of the following operations:exclusive OR (XOR) 1. A AND NOT B OR.
CH51 Chapter 5 Combinational Logic By Taweesak Reungpeerakul.
Digital Fundamentals Floyd Chapter 3 Tenth Edition
COMPUTER ARCHITECTURE TRUTH TABLES AND LOGIC GATES.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
Figure 10.1 Cross-NOR S-R flip-flop: (a) Set condition; (b) Reset condition.
CHAPTER 5 Combinational Logic Analysis
ECE DIGITAL LOGIC LECTURE 5: BINARY LOGIC AND DIGITAL LOGIC GATES Assistant Prof. Fareena Saqib Florida Institute of Technology Fall 2016, 01/28/2016.
The inverter performs the Boolean NOT operation. When the input is LOW, the output is HIGH; when the input is HIGH, the output is LOW. The Inverter AX.
© 2009 Pearson Education, Upper Saddle River, NJ All Rights ReservedFloyd, Digital Fundamentals, 10 th ed Digital Logic Design Dr. Oliver Faust.
Chapter 5 Boolean Algebra and Reduction Techniques 1.
Chapter 33 Basic Logic Gates. Objectives After completing this chapter, you will be able to: –Identify and explain the function of the basic logic gates.
1 Ch.3 Logic Gates and Boolean Algebra – Part 1
Copyright ©2009 by Pearson Higher Education, Inc. Upper Saddle River, New Jersey All rights reserved. Digital Fundamentals, Tenth Edition Thomas.
Ch.4 Combinational Logic Circuits
Universal Gate – NOR Universal Gate - NOR Digital Electronics
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Digital Fundamentals Floyd Chapter 3 Tenth Edition
Logic Gates.
EI205 Lecture 3 Dianguang Ma Fall, 2008.
Logic Gates and Boolean Algebra
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Digital Fundamentals Floyd Chapter 3 Tenth Edition
Logic Gates.
Logic Gates Benchmark Companies Inc PO Box Aurora CO
EI205 Lecture 5 Dianguang Ma Fall 2008.
Exclusive OR Gate.
Boolean Algebra and Combinational Logic
KS4 Electricity – Electronic systems
KS4 Electricity – Electronic systems
Principles & Applications
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Universal Gate – NOR Universal Gate - NOR Digital Electronics
UNIVERSAL GATES.
Digital Logic & Design Lecture 05
Universal Gate – NAND Universal Gate - NAND Digital Electronics
Digital Fundamentals Floyd Chapter 3 Tenth Edition
Waveforms & Timing Diagrams
Logic Gates.
KS4 Electricity – Electronic systems
EET 1131 Unit 3 Basic Logic Gates
Universal Gate – NOR Universal Gate - NOR Digital Electronics
GCSE Computer Science – Logic Gates & Boolean Expressions
Digital Fundamentals Floyd Chapter 5 Tenth Edition
Department of Electronics
Logic Gates AIM: To know the different types of logic gate
Presentation transcript:

Chapter 3 (part 2) Basic Logic Gates 1

3-7 The Inverter Used to complement (invert) a digital signal When A = 1, X = 0 When A = 0, X = 1 Timing analysis

Truth table and Boolean equations for the Inverter X = A Inversion bar Used to signify the complement Inverter is also called as NOT gate Truth Table

3-8 The NAND Gate Same as the AND gate except that its output is inverted If A = 1 and B = 1, X = 0 If A = 0 or B = 0, A = 1

I/O of a 7400 quad NAND IC

Truth table and Boolean equations for the NAND Gate Boolean Equation: X = AB Multiple inputs - the output is always HIGH unless all inputs go HIGH

Symbols for three- and eight-input NAND gates

3-9 The NOR Gate Same as the OR gate except that its output is inverted If A = 1 or B = 1, X = 0 If A = 0 and B = 0, X = 1

I/O of a 7402 quad NOR IC

Truth Table and Boolean equation for The NOR Gate Boolean Equation: X = A + B

3-10 Logic Gate Waveform Generation A popular general Purpose Repetitive waveform generator To create specialized waveforms, we use Basic gates, and a clock oscillator, and A repetitive waveform generator circuit

Figure 3.44 Generating a 3-ms HIGH pulse using an AND gate and a Johnson shift counter.

Example 3-13 Which Johnson counter outputs will you connect to an AND gate to get a 1ms HIGH-level output from 4 to 5ms?

Example 3-14 Which Johnson counter outputs must be connect to a three-input AND gate to enable just the Cp#4 pulse only to be output?

Example 3-15 Sketch the output waveform resulting from inputting the Johnson counter outputs shown:

Figure 3.60 7404 TTL and 4049 CMOS inverter pin configurations.

Figure 3.61 (a) 7402 TTL NOR and 4001 CMOS NOR pin configurations; (b) 7400 TTL NAND and 4011 CMOS NAND pin configurations.

3-12 IEEE/IEC Standard Logic Symbols

Summary The AND gate requires that all inputs are HIGH in order to get a HIGH output. The OR gate outputs a HIGH if any of its inputs are HIGH. An effective way to measure the precise timing relationships of digital waveforms is with an oscilloscope or a logic analyzer.

Summary Beside providing the basic logic functions, AND and OR gates can also be used to enable or disable a signal to pass from one point to another. There are several integrated circuits available in both TTL and CMOS that provide the basic logic functions.

Summary Two important troubleshooting tools are the logic pulser and the logic probe. The pulser is used to inject pulses into a circuit under test. The probe reads the level at a point in a circuit to determine is it is HIGH, LOW, or floating. An inverter provides an output that is the complement of its input.

Summary A NAND gate outputs a LOW when all of its inputs are HIGH. A NOR gate outputs a HIGH when all of its inputs are LOW. Specialized waveforms can be created by using a repetitive waveform generator and the basic gates. 40