Department of Electrical Engineering, National Taiwan Ocean University Timer/WatchDog /RTC 4/11/2013 Richard Kuo Assistant Professor

Department of Electrical Engineering, National Taiwan Ocean University Outline ► NuMicro MCU Timer/WatchDog Timer/Real-Time Clock –6.NuMicro_Timer_WatchDog_RTC.ppt ► Exercise: Timer – one-shot 、 periodic 、 continuous (Smpl_Timer) –set Timer 0,1,2,3 at different counting frequency and display on LCD ► Exercise: Watch-Dog Timer (Smpl_WDT) –Set Watch-Dog Timer at 10KHz ► Exercise: Real-Time Clock (Smpl_RTC) –set RTC alarm & display RTC time ► Exercise: using Timer + WatchDog Timer + RTC alarm (Smpl_Timer_WDT_RTC) –Use Timer & WatchDogt Timer & RTC all in one program

Department of Electrical Engineering, National Taiwan Ocean University Interrupt Type ► NVIC_EnableIRQ(WDT_IRQn); –vector defined in startup_NUC1xx.s –IRQ type defined in NUC1xx.h typedef enum IRQn { //****** Cortex-M0 Processor Exceptions Numbers //NonMaskableInt_IRQn = -14, /*!< 2 Non Maskable Interrupt //HardFault_IRQn = -13, /*!< 3 Cortex-M0 Hard Fault Interrupt //SVCall_IRQn = -5, /*!< 11 Cortex-M0 SV Call Interrupt //PendSV_IRQn = -2, /*!< 14 Cortex-M0 Pend SV Interrupt //SysTick_IRQn = -1, /*!< 15 Cortex-M0 System Tick Interrupt //******************* NUC1xx Interrupt Numbers ****************** BOD_IRQn = 0, WDT_IRQn = 1, … RTC_IRQn = 31 } IRQn_Type;

Department of Electrical Engineering, National Taiwan Ocean University Interrupt Handler __Vectors DCD __initial_sp ; Top of Stack DCD Reset_Handler ; Reset Handler DCD NMI_Handler ; NMI Handler DCD HardFault_Handler ; Hard Fault Handler DCD 0 ; Reserved DCD SVC_Handler ; SVCall Handler DCD 0 ; Reserved DCD PendSV_Handler ; PendSV Handler DCD SysTick_Handler ; SysTick Handler ; External Interrupts ; maximum of 32 External Interrupts are possible DCD BOD_IRQHandler DCD WDT_IRQHandler DCD EINT0_IRQHandler DCD EINT1_IRQHandler DCD GPAB_IRQHandler DCD GPCDE_IRQHandler DCD PWMA_IRQHandler DCD PWMB_IRQHandler DCD TMR0_IRQHandler DCD TMR1_IRQHandler DCD TMR2_IRQHandler DCD TMR3_IRQHandler DCD UART02_IRQHandler DCD UART1_IRQHandler DCD SPI0_IRQHandler DCD SPI1_IRQHandler DCD SPI2_IRQHandler DCD SPI3_IRQHandler DCD I2C0_IRQHandler DCD I2C1_IRQHandler DCD CAN0_IRQHandler DCD Default_Handler DCD USBD_IRQHandler DCD PS2_IRQHandler DCD ACMP_IRQHandler DCD PDMA_IRQHandler DCD I2S_IRQHandler DCD PWRWU_IRQHandler DCD ADC_IRQHandler DCD Default_Handler DCD RTC_IRQHandler defined in startup_NUC1xx.s

Department of Electrical Engineering, National Taiwan Ocean University Timer0 Interrupt Handler void TMR0_IRQHandler(void) // Timer0 interrupt subroutine { char TEXT_Timer[16]="Timer:"; TimerCounter+=1; sprintf(TEXT_Timer+6,"%d",TimerCounter); print_lcd(1, TEXT_Timer); TIMER0->TISR.TIF =1; }

Department of Electrical Engineering, National Taiwan Ocean University WDT Interrupt Handler void WDT_IRQHandler(void) { UNLOCKREG(); WDT->WTCR.WTIF =1; WDT->WTCR.WTR = 1; UNLOCKREG(); print_lcd(3, "WDT interrupt"); }

Department of Electrical Engineering, National Taiwan Ocean University RTC Interrupt Handler void RTC_IRQHandler(void) { uint32_t clock; char TEXT_RTC[16]="RTC : "; /* tick */ if(inpw(&RTC->RIIR)&0x2) { clock=inpw(&RTC->TLR)&0xFFFFFF; sprintf(TEXT_RTC+6,"%02x",(clock>>16)&0xFF); sprintf(TEXT_RTC+9,"%02x",((clock)>>8)&0xFF); sprintf(TEXT_RTC+12,"%02x",clock&0xFF); TEXT_RTC[8]=':'; TEXT_RTC[11]=':'; Show_Word(0,13,' '); print_lcd(0, TEXT_RTC); outpw(&RTC->RIIR,2); } /* alarm */ if(inpw(&RTC->RIIR)&0x1) { print_lcd(2, "RTC Alarm !!!"); GPIOC->DOUT&=0xFF; Alarm_E=0; outpw(&RTC->RIIR,1); }

Department of Electrical Engineering, National Taiwan Ocean University Timer Features ► Four 24-bit up-counting timer ► A prescaler (divider) for each Timer ► Selectable 5 clock source ► Four modes : one shot, periodic, toggle, continuous ► Timeout Period calculation Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24- bit TCMP)

Department of Electrical Engineering, National Taiwan Ocean University Timer Clock Source Trigger source: TM0  PB8, TM1  PB9 TM2  PB10, TM3  PB11 Rising edge

Department of Electrical Engineering, National Taiwan Ocean University Timer block diagram

Department of Electrical Engineering, National Taiwan Ocean University Timer operation modes ► Ex. PCMPR = 100 Mode=0 Mode=1 Mode=3 Toggle mode One shot 0100 Periodic 0100 Reset counter Overflow 0100 Interrupt

Department of Electrical Engineering, National Taiwan Ocean University Smpl_Timer

Department of Electrical Engineering, National Taiwan Ocean University InitTimer0() void InitTIMER0(void) { /* Step 1. Enable and Select Timer clock source */ SYSCLK->CLKSEL1.TMR0_S = 0;//Select 12Mhz for Timer0 clock source SYSCLK->APBCLK.TMR0_EN =1;//Enable Timer0 clock source /* Step 2. Select Operation mode */ TIMER0->TCSR.MODE=0;//Select once mode for operation mode /* Step 3. Select Time out period = (Period of timer clock input) * (8-bit Prescale + 1) * (24-bit TCMP)*/ TIMER0->TCSR.PRESCALE=255;// Set Prescale [0~255] TIMER0->TCMPR = 46875;// Set TCMPR [0~ ] // (1/ )*(255+1)* = 1 sec / 1 Hz /* Step 4. Enable interrupt */ TIMER0->TCSR.IE = 1; TIMER0->TISR.TIF = 1;//Write 1 to clear for safty NVIC_EnableIRQ(TMR0_IRQn);//Enable Timer0 Interrupt /* Step 5. Enable Timer module */ TIMER0->TCSR.CRST = 1;//Reset up counter TIMER0->TCSR.CEN = 1;//Enable Timer0 // TIMER0->TCSR.TDR_EN=1;// Enable TDR function }

Department of Electrical Engineering, National Taiwan Ocean University TMR0_IRQHandler() void TMR0_IRQHandler(void) // Timer0 interrupt subroutine { char TEXT1[16]="Timer0: "; Timer0Counter+=1; sprintf(TEXT1+7,"%d",Timer0Counter); print_lcd(1, TEXT1); TIMER0->TISR.TIF =1; }

Department of Electrical Engineering, National Taiwan Ocean University Smpl_Timer int32_t main (void) { UNLOCKREG(); SYSCLK->PWRCON.XTL32K_EN = 1;//Enable 32Khz for RTC clock source SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz Crystal SYSCLK->CLKSEL0.HCLK_S = 0; LOCKREG(); Initial_panel(); clr_all_panel(); print_lcd(0,"Smpl_Timer"); InitTIMER0(); InitTIMER1(); InitTIMER2(); while(1) { __NOP(); // No Operation }

Department of Electrical Engineering, National Taiwan Ocean University WatchDog Timer ► 18-bit up counter ► 8 selections of time out period ► Support function: – WDT interrupt – WDT reset – WDT wakeup

Department of Electrical Engineering, National Taiwan Ocean University WDT Clock = Generato

Department of Electrical Engineering, National Taiwan Ocean University Watch mode Block Diagram ► WDT can cause a WDT Interrupt or WDT Reset to CPU after a fixed delay period. ► WDT also can wakeup CPU form Power-down mode

Department of Electrical Engineering, National Taiwan Ocean University WDT Time out selection WTIS Interrupt Timeout Watchdog Reset Timeout WTR Timeout Interval for Reset (WDT_CLK=12MHz) WTR Timeout Interval for Reset (WDT_CLK=32KHz) WDT_CLK (16 WDT_CLK) ( ) WDT_CLK (1040 WDT_CLK) 86.67us32.5 ms WDT_CLK ( ) WDT_CLK us34 ms WDT_CLK ( ) WDT_CLK us40 ms WDT_CLK( ) WDT_CLK us64 ms WDT_CLK( ) WDT_CLK us160 ms WDT_CLK( ) WDT_CLK 1.45 ms544 ms WDT_CLK( ) WDT_CLK 5.55 ms2080 ms WDT_CLK( ) WDT_CLK ms8224 ms `

Department of Electrical Engineering, National Taiwan Ocean University Smpl_WDT

Department of Electrical Engineering, National Taiwan Ocean University InitWDT() // Initialize Watch-Dog Timer void InitWDT(void) { UNLOCKREG(); /* Step 1. Enable and Select WDT clock source */ SYSCLK->CLKSEL1.WDT_S =3;//Select 10Khz for WDT clock source SYSCLK->APBCLK.WDT_EN =1;//Enable WDT clock source /* Step 2. Select Timeout Interval */ WDT->WTCR.WTIS=5; /* Step 3. Disable Watchdog Timer Reset function */ WDT->WTCR.WTRE = 0; /* Step 4. Enable WDT interrupt */ WDT->WTCR.WTIF =1;//Write 1 to clear for safety WDT->WTCR.WTIE = 1; NVIC_EnableIRQ(WDT_IRQn); /* Step 5. Enable WDT module */ //Enable WDT WDT->WTCR.WTE = 1; //Clear WDT counter WDT->WTCR.WTR = 1; LOCKREG(); }

Department of Electrical Engineering, National Taiwan Ocean University WDT_IRQHandler() // Watch-Dog Timer Interrupt Handler void WDT_IRQHandler(void) { UNLOCKREG(); WDT->WTCR.WTIF =1; WDT->WTCR.WTR = 1; UNLOCKREG(); print_lcd(1, "WatchDog Timer "); print_lcd(2, "Interrupt !!! "); }

Department of Electrical Engineering, National Taiwan Ocean University Smpl_WDT int32_t main (void) { UNLOCKREG(); SYSCLK->PWRCON.XTL32K_EN = 1;//Enable 32KHz for RTC clock source SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz crystal SYSCLK->CLKSEL0.HCLK_S = 0; LOCKREG(); Initial_panel(); clr_all_panel(); print_lcd(0,"Smpl_WDT"); InitWDT(); while(1) { __NOP(); }

Department of Electrical Engineering, National Taiwan Ocean University RTC Features ► RTC counter –Time counter –Calendar counter –Day of week –Leap year –BCD format TLR=0x CLR=0x ► A set of Alarm ► Alarm and time tick interrupt ► Wakeup function ► 32KHz compensation

Department of Electrical Engineering, National Taiwan Ocean University RTC Block Diagram 25 INIR ( ) ( 0xA5EB1357) AER () (0xA965) 512 RTC clock ≒ 15msec

Department of Electrical Engineering, National Taiwan Ocean University RTC Access RegisterOffsetR/WDescriptionReset ValueAER[16]=0 RTC_BA = 0x4000_8000 INIRRTC_BA+0x000R/WRTC Initiation Register(A5EB1357)0x0000_0000R/W AERRTC_BA+0x004R/WRTC Access Enable Register(A965)0x0000_0000R/W FCRRTC_BA+0x008R/WRTC Frequency Compensation Register 0x0000_0700- TLRRTC_BA+0x00CR/WTime Loading Register0x0000_0000R CLRRTC_BA+0x010R/WCalendar Loading Register0x0005_0101R TSSRRTC_BA+0x014R/WTime Scale Selection Register0x0000_0001R/W DWRRTC_BA+0x018R/WDay of the Week Register0x0000_0006R TARRTC_BA+0x01CR/WTime Alarm Register0x0000_0000- CARRTC_BA+0x020R/WCalendar Alarm Register0x0000_0000- LIRRTC_BA+0x024RLeap year Indicator Register0x0000_0000R RIERRTC_BA+0x028R/WRTC Interrupt Enable Register0x0000_0000R/W RIIRRTC_BA+0x02CR/CRTC Interrupt Indicator Register0x0000_0000R/C TTRRTC_BA+0x030R/WRTC Time Tick Register0x0000_0000- Access enable Access disable

Department of Electrical Engineering, National Taiwan Ocean University 24-hour/12-hour Mapping Table 24-hour time scale 12-hour time scale 24-hour time scale 12-hour time scale (PM time + 0x20) 0x000x12(AM12)0x120x32(PM12) 0x010x01(AM01)0x130x21(PM01) 0x020x02(AM02)0x140x22(PM02) 0x030x03(AM03)0x150x23(PM03) 0x040x04(AM04)0x160x24(PM04) 0x050x05(AM05)0x170x25(PM05) 0x060x06(AM06)0x180x26(PM06) 0x070x07(AM07)0x190x27(PM07) 0x080x08(AM08)0x200x28(PM08) 0x090x09(AM09)0x210x29(PM09) 0x100x10(AM10)0x220x30(PM10) 0x110x11(AM11)0x230x31(PM11) =AM time=PM time+0x20 BCD Format

Department of Electrical Engineering, National Taiwan Ocean University RTC Example ► RTC sample code with driver –Enable RTC and set date and time Date: Time: –Enable alarm interrupt and set alarm date and time Alarm date: Alarm Time: ► RTC sample code –The same flow

Department of Electrical Engineering, National Taiwan Ocean University Smpl_RTC

Department of Electrical Engineering, National Taiwan Ocean University Smpl_RTC RTC register access #include #include "NUC1xx.h" #include "LCD_Driver.h" static uint8_t Alarm_E=1; // RTC register access void set_TLR (int32_t a,int32_t b,int32_t c,int32_t d,int32_t e,int32_t f) { outpw(&RTC->TLR, a<<20|b<<16|c<<12|d<<8|e<<4|f) ; } void set_CLR (int32_t a,int32_t b,int32_t c,int32_t d,int32_t e,int32_t f) { outpw(&RTC->CLR, a<<20|b<<16|c<<12|d<<8|e<<4|f) ; } void set_TAR(int32_t a,int32_t b,int32_t c,int32_t d,int32_t e,int32_t f) { outpw(&RTC->TAR, a<<20|b<<16|c<<12|d<<8|e<<4|f); } void set_CAR (int32_t a,int32_t b,int32_t c,int32_t d,int32_t e,int32_t f) { outpw(&RTC->CAR, a<<20|b<<16|c<<12|d<<8|e<<4|f); }

Department of Electrical Engineering, National Taiwan Ocean University START_RTC() // start Real-Time Clock void START_RTC(void) { while(1) { RTC->INIR = 0xa5eb1357; if(inpw(&RTC->INIR)==1) break; } while(1) { RTC->AER.AER = 0xA965; if(inpw(&RTC->AER)&0x10000)// AER bit break; }

Department of Electrical Engineering, National Taiwan Ocean University InitRTC() void InitRTC(void) { UNLOCKREG(); /* Step 1. Enable and Select RTC clock source */ SYSCLK->PWRCON.XTL32K_EN = 1;//Enable 32Khz for RTC clock source SYSCLK->APBCLK.RTC_EN =1;//Enable RTC clock source /* Step 2. Initiate and unlock RTC module */ START_RTC(); /* Step 3. Initiate Time and Calendar setting */ RTC->TSSR.HR24_HR12 =1;//Set 24hour mode //Set time and calendar for loading register, Calendar  09/1/19, Time  13:20:00 set_CLR(0,9,0,1,1,9); set_TLR(1,3,2,0,0,0); /* Step 4. Set alarm interrupt */ //Set time and calendar for alarm register, Calendar  09/1/19, Time  13:30:00 set_CAR(0,9,0,1,1,9); set_TAR(1,3,2,0,2,0); //Enable alarm interrupt RTC->RIER.AIER = 1; RTC->RIER.TIER = 1; NVIC_EnableIRQ(RTC_IRQn); }

Department of Electrical Engineering, National Taiwan Ocean University Smpl_RTC main() int32_t main (void) { UNLOCKREG(); SYSCLK->PWRCON.XTL32K_EN = 1;//Enable 32KHz for RTC clock source SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz crystal SYSCLK->CLKSEL0.HCLK_S = 0; LOCKREG(); Initial_panel(); clr_all_panel(); print_lcd(0,"Smpl_RTC"); InitRTC(); /* Synch field transmission & Request Identifier Field transmission*/ while(Alarm_E) { UNLOCKREG(); WDT->WTCR.WTR =1;//Write 1 to clear for safety LOCKREG(); } while(1) { __NOP(); }

Department of Electrical Engineering, National Taiwan Ocean University Smpl_Timer_WDT_RTC

Department of Electrical Engineering, National Taiwan Ocean University Smpl_Timer_WDT_RTC int32_t main (void) { UNLOCKREG(); SYSCLK->PWRCON.XTL32K_EN = 1;//Enable 32KHz for RTC clock source SYSCLK->PWRCON.XTL12M_EN = 1;//Enable 12MHz crystal SYSCLK->CLKSEL0.HCLK_S = 0; LOCKREG(); Initial_panel(); clr_all_panel(); InitTIMER0(); InitRTC(); InitWDT(); /* Synch field transmission & Request Identifier Field transmission*/ while(Alarm_E) { UNLOCKREG(); WDT->WTCR.WTR =1;//Write 1 to clear for safety LOCKREG(); } while(1) { __NOP(); }

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