Trace-Based Optimization for Precomputation and Prefetching Madhusudan Raman Supervisor: Prof. Michael Voss

Motivation Processors read and write data from memory Over 50% of execution time Memory Access CPU Cache Main Memory

SMT/Hyperthreading Some CPUs run multiple threads at a time Pentium IV, IBM Power5 Can we use one thread to speed up another? Yes, Prefetch data into the shared cache Cache Main Memory CPU 1 CPU 2

TOPP Inspect application as it runs Detect “costly” memory accesses On the fly, generate and execute code to fetch program data before it is needed Inspect Generate Code CPU 2 - Execute Prefetching Code CPU 1 - Run Program Identify costly memory accesses

Why is this novel? Transparent to application user Could be made transparent to developer Optimizations done completely at runtime Uses Trace-Based Optimization Driven by built-in hardware performance counters