1 © 2014 B. Wilkinson Modification date: Dec Sequential Logic Circuits Previously, we described the basic building blocks of sequential circuits, namely flip-flops, and briefly showed how flip-flops can be used to create counters. Now we shall describe a formal way of describing and designing any sequential logic circuit. This material is for the sole and exclusive use of students at UNC-Charlotte. It is not to be sold, reproduced, or generally distributed.

2 A practical sequential circuit exists in a finite number of states. Hence called finite state machines or simply state machines. The states represented by binary signals called state variables. The state variables are stored in flip-flops, activated by the external clock signal.

3 Synchronous Sequential Circuit 1 - Moore Model Note in this model, outputs are a function of the state variables only.

4 Question How many flip-flops are needed for a state machine having forty-eight states? Answer

5 Design problem 1 – Arbitrary code counter with two sequences Suppose a synchronous counter is required that follows one of two repeating sequences, dependent upon a control input, C. When C = 0, the sequence is 00, 01, 11. When C = 1, the sequence is 00, 11, 01. The Moore model is suitable since the flip-flop state outputs as also the outputs of the sequential circuit

6 Design steps Step 1 Derive the state diagram Needs two flip flops, which has four states, three used here. The fourth state might appear upon switch-on, mapped to lead to state 1. State encoding (here arbitrary) C State number

7 Step 2 Derive the state table Shows the transitions from one state to another state, so more accurate name for table is state transition table.

8 Step 3 Draw the assigned state table Replace state numbers with assigned state variables: Y 2 Y 1 for next state, which will become inputs to the flip- flops, see model y 2 y 1 for present state flip- flop outputs State 1 State 2 State 3 State 4 In this case just arbitrary assignment, see later for a more formal way

9 Step 4 Derive inputs to state flip-flops If we use D-type flip-flops, Y inputs are simply the state values of the y outputs required after the next activating clock Work out Boolean expressions for Y 2, Y 1 in terms of y 2, y 1, and C, see next slide

10 Draw Karnaugh maps for the Y 2, Y 1 functions: Not minimal, so as to reuse term in Y 2

11 Step 5 Draw Circuit

12 Question Identify an alternative set of D-type flip-flop input equations that share a term.

13 In the previous design, the state variables were also the circuit outputs. Let us now design a synchronous sequential circuit whose circuit outputs are some function of the state variables, and whose state encoding is not immediately obvious from the design specification. (It is clear with a counter that the state variables should follow the defined counter sequence.)

14 Design problem 2 – sequence detector Design a synchronous sequential logic circuit that will detect the pattern appearing on a single data input, x. Output Z to become a 1 immediately after the last bit appears in the sequence. A circuit of this form might find application in several areas, including detecting the synchronization pattern recorded on magnetic disks before or after data, or synchronization patterns in data communications.

15 Design procedure Step 1 Derive the state diagram Step 2 Draw the state table Step 3aAssign state variable patterns to states Step 3bDraw the assigned state table Step 4aDerive the flip-flop input functions (on Karnaugh maps), and in our design: Step 4bDerive the output function of a Karnaugh map, and finally, Step 5Draw the logic circuit

16 Step 1 Derive the state diagram Input, x

17 Step 2 Draw the state table Notice now an output function

18 Step 3 Assign state variable patterns to states and draw assigned state table Very large number of possible assignments and each would lead to specific next state and output functions. Usually prefer an assignment that leads to the simplest functions, but unfortunately a general method that would work in all cases is not known.

19 Some strategies (A simpler minimized function is obtained if the 1’s on Karnaugh maps are adjacent.) Rule 1 – Assign codes which differ in one variable to states that lead to the same next state. If this cannot be done, then: Rule 2 – Assign codes that differ in one variable for next states of a present state. Rules 1 and 2 are intended to create the simplest next state functions. These rules are only suggestions and cannot guarantee a design with minimum logic.

20 If this cannot be done, then: Rule 3 – Assign codes that differ in one variable to states with the same output (with the same inputs) Rule 3 is intended to create the simplest output function

21 Gray code Has the characteristic that adjacent codes differ by one bit. Many possible Gray codes. A Gray code is used in Karnaugh map labelling. For three variables, the pattern of this Gray code is 000, 001, 011, 010, 110, 111, 101, 100. Hence a Gray code would be a suitable encoding for a series of states, where one state leads to one other state.

22 For our problem: using rule 1 on states 4, 5 and 8 (states 4, 5 and 8 can lead to state 1), and using rule 1 on states 3, 6 and 7 (states 3, 6 and 7 can lead to state 2), we make the assignment: State 1 = 000State 2 = 111 State 4 = 001State 3 = 101 State 5 = 010State 6 = 110 State 8 = 100State 7 = 011 Using 000 for state 1 enables the flip-flops to be initialized to state 1 easily.

23 Assigned state table for sequence detector

24 Step 4 Derive inputs to state flip-flops If we use D-type flip-flops,Y inputs are simply the state values of the y outputs required after the next activating clock Work out Boolean expressions for Y 3,Y 2, Y 1 in terms of y 3, y 2, y 1, and x, see next slide

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26 Output function Work out Boolean expressions for Z in terms of y 3, y 2, y 1.

27 Step 5 Draw Circuit

28 Synchronous Sequential Circuit-Mealy Model Note: Outputs are a function of the state variables and the inputs. Differs from a Moore model in that the outputs depend not only on the actual state but the inputs occurring to take it to that state.

29 Mealy model designs Often the Mealy model state diagram has less states than a Moore model state diagram for the same problem, and potentially less state variables and state flip-flops. However, the output function may be more complex as it will use the input variables as well as the state variables. Perhaps more importantly, the outputs could change if the inputs change between clock transitions. This may, or may not, be significant in a system design depending upon the application.

30 Let us look at a Mealy model solution to our sequence detector problem detecting the sequence The same design steps have to be done, namely: Step 1 Derive the state diagram Step 2 Draw the state table Step 3aAssign state variable patterns to states Step 3bDraw the assigned state table Step 4aDerive the flip-flop input functions (on Karnaugh maps), and in our design: Step 4bDerive the output function of a Karnaugh map, and finally, Step 5Draw the logic circuit

31 Mealy model state diagram indicates the outputs on the arcs leading to the state, together with the inputs that caused the transition to that state. Step 1 Derive the state diagram

32 State 8 now eliminated. Transition from state 7 to state 8 replaced by a transition from state 7 to state 1 when final bit of sequence received. Now circuit could have one of two output values in state 1: either Z = 0 if the sequence has not been received, or Z = 1 if the sequence has been received.

33 Step 2 Draw the state table Step 3 Assigned state state table

34 Step 4 Derive inputs to state flip-flops Work out Boolean expressions for Y 3,Y 2, Y 1 in terms of y 3, y 2, y 1, and x, see next slide

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36 Output Function Work out Boolean expressions for Z in terms of y 3, y 2, y 1, and x, see next slide

37 Output function

38 Question What would happen, if anything, to the Z output if x changes from a 1 to a 0 while Z is a 0?

39 Questions

40 To add using S-R and J-K flip flops Not done, state minimization Uisng state transition expressions

41 State diagrams using transition expressions If transition from one state to another state specified by several input variables, previous state diagrams clumsy. A more convenient notation is to give Boolean condition necessary for the transition or no transition in so-called transition expressions. Very important that all combinations of variable values accounted for in diagram. Also, a particular combination of values must not make more than one transition expression true as this would be ambiguous.