1 Basic Dividers Lecture 10

Required Reading Chapter 13, Basic Division Schemes 13.1, Shift/Subtract Division Algorithms 13.3, Restoring Hardware Dividers 13.4, Non-Restoring and Signed Division Behrooz Parhami, Computer Arithmetic: Algorithms and Hardware Design

Notation and Basic Equations

4 Notation z Dividend z 2k-1 z 2k-2... z 2 z 1 z 0 d Divisor d k-1 d k-2... d 1 d 0 q Quotient q k-1 q k-2... q 1 q 0 s Remainder s k-1 s k-2... s 1 s 0 (s = z - dq)

5 Basic Equations of Division z = d q + s sign(s) = sign(z) | s | < | d | z > 0 0  s < | d | z < 0 - | d | < s  0

6 Unsigned Integer Division Overflow z = z H 2 k + z L < d 2 k Condition for no overflow (i.e. q fits in k bits): z = q d + s < (2 k -1) d + d = d 2 k z H < d Must check overflow because obviously the quotient q can also be 2k bits. For example, if the divisor d is 1, then the quotient q is the dividend z, which is 2k bits

7 Sequential Integer Division Basic Equations s (0) = z s (j) = 2 s (j-1) - q k-j (2 k d) for j=1..k s (k) = 2 k s

8 Sequential Integer Division Justification s (1) = 2 z - q k-1 (2 k d) s (2) = 2(2 z - q k-1 (2 k d)) - q k-2 (2 k d) s (3) = 2(2(2 z - q k-1 (2 k d)) - q k-2 (2 k d)) - q k-3 (2 k d)... s (k) = 2(... 2(2(2 z - q k-1 (2 k d)) - q k-2 (2 k d)) - q k-3 (2 k d)... - q 0 (2 k d) = = 2 k z - (2 k d) (q k-1 2 k-1 + q k-2 2 k-2 + q k-3 2 k-3 + … + q ) = = 2 k z - (2 k d) q = 2 k (z - d q) = 2 k s

9 Fig Examples of sequential division with integer and fractional operands.

Fractional Division

11 Unsigned Fractional Division z frac Dividend.z -1 z z -(2k-1) z -2k d frac Divisor.d -1 d d -(k-1) d -k q frac Quotient.q -1 q q -(k-1) q -k s frac Remainder.000…0s -(k+1)... s -(2k-1) s -2k k bits

12 Integer vs. Fractional Division For Integers: z = q d + s  2 -2k z 2 -2k = (q 2 -k ) (d 2 -k ) + s (2 -2k ) z frac = q frac d frac + s frac For Fractions: where z frac = z 2 -2k d frac = d 2 -k q frac = q 2 -k s frac = s 2 -2k

13 Unsigned Fractional Division Overflow Condition for no overflow: z frac < d frac

14 Sequential Fractional Division Basic Equations s (0) = z frac s (j) = 2 s (j-1) - q -j d frac for j=1..k 2 k · s frac = s (k) s frac = 2 -k · s (k)

15 Sequential Fractional Division Justification s (1) = 2 z frac - q -1 d frac s (2) = 2(2 z frac - q -1 d frac ) - q -2 d frac s (3) = 2(2(2 z frac - q -1 d frac ) - q -2 d frac ) - q -3 d frac... s (k) = 2(... 2(2(2 z frac - q -1 d frac ) - q -2 d frac ) - q -3 d frac... - q -k d frac = = 2 k z frac - d frac (q -1 2 k-1 + q -2 2 k-2 + q -3 2 k-3 + … + q -k 2 0 ) = = 2 k z frac - d frac 2 k (q q q … + q -k 2 -k ) = = 2 k z frac - (2 k d frac ) q frac = 2 k (z frac - d frac q frac ) = 2 k s frac

Restoring Unsigned Integer Division

17 Restoring Unsigned Integer Division s (0) = z for j = 1 to k if 2 s (j-1) - 2 k d > 0 q k-j = 1 s (j) = 2 s (j-1) - 2 k d else q k-j = 0 s (j) = 2 s (j-1)

18 Fig Example of restoring unsigned division.

19 Fig Shift/subtract sequential restoring divider.

Non-Restoring Unsigned Integer Division

s (1) = 2 z - 2 k d for j = 2 to k if s (j-1)  0 q k-(j-1) = 1 s (j) = 2 s (j-1) - 2 k d else q k-(j-1) = 0 s (j) = 2 s (j-1) + 2 k d end for if s (k)  0 q 0 = 1 else q 0 = 0 Correction step

22 Non-Restoring Unsigned Integer Division Correction step z = q d + s z = (q-1) d + (s+d) z = q’ d + s’ z, q, d ≥ 0 s<0 s = 2 -k · s (k)

23 Fig Example of nonrestoring unsigned division.

24 Fig Partial remainder variations for restoring and nonrestoring division.

25 s (j) = 2 s (j-1) s (j+1) = 2 s (j) - 2 k d = = 4 s (j-1) - 2 k d s (j) = 2 s (j-1) - 2 k d s (j+1) = 2 s (j) + 2 k d = = 2 (2 s (j-1) - 2 k d) + 2 k d = = 4 s (j-1) - 2 k d Restoring division Non-Restoring division Non-Restoring Unsigned Integer Division Justification s (j-1) ≥ 0 2 s (j-1) - 2 k d < 0 2 (2 s (j-1) ) - 2 k d ≥ 0

Signed Integer Division

27 Signed Integer Division z d | z || d |sign(z)sign(d) | q || s | sign(s) = sign(z) sign(q) = + - Unsigned division sign(z) = sign(d) sign(z)  sign(d) qs

28 Examples of division with signed operands z = 5d = 3  q = 1s = 2 z = 5d = –3  q = –1s = 2 z = –5d = 3  q = –1s = –2 z = –5d = –3  q = 1s = –2 Magnitudes of q and s are unaffected by input signs Signs of q and s are derivable from signs of z and d Examples of Signed Integer Division

Non-Restoring Signed Integer Division

30 Non-Restoring Signed Integer Division s (0) = z for j = 1 to k if sign(s (j-1) ) == sign(d) q k-j = 1 s (j) = 2 s (j-1) - 2 k d = 2 s (j-1) - q k-j (2 k d) else q k-j = -1 s (j) = 2 s (j-1) + 2 k d = 2 s (j-1) - q k-j (2 k d) q = BSD_2’s_comp_conversion(q) Correction_step

31 Non-Restoring Signed Integer Division Correction step z = q d + s z = (q-1) d + (s+d) z = q’ d + s’ z = (q+1) d + (s-d) z = q” d + s” s = 2 -k · s (k) sign(s) = sign(z)

32 Fig Example of nonrestoring signed division. ======================== z d –2 4 d ======================== s (0) s (0) sign(s (0) )  sign(d), +2 4 d so set q 3 =  1 and add –––––––––––––––––––––––– s (1) s (1) sign(s (1) ) = sign(d), +(–2 4 d) so set q 2 = 1 and subtract –––––––––––––––––––––––– s (2) s (2) sign(s (2) )  sign(d), +2 4 d so set q 1 =  1 and add –––––––––––––––––––––––– s (3) s (3) sign(s (3) ) = sign(d), +(–2 4 d) so set q 0 = 1 and subtract –––––––––––––––––––––––– s (4) sign(s (4) )  sign(z), +(–2 4 d) so perform corrective subtraction –––––––––––––––––––––––– s (4) s q  1 1  1 1 ======================== p = Shift, compl MSB Add 1 to correct Check: 33/(  7) =  4

33 BSD  2’s Complement Conversion q = (q k-1 q k-2... q 1 q 0 ) BSD = = (p k-1 p k-2... p 1 p 0 1) 2’s complement where pipi qiqi Example: q BSD p q 2’scomp = no overflow if p k-2 = p k-1 (q k-1  q k-2 )

Fast Review of Fast Dividers

35 Classification of Dividers Sequential Radix-2High-radix Restoring Non-restoring regular SRT regular using carry save adders SRT using carry save adders Array Dividers by Convergence

36 Array Dividers

37 Fig Restoring array divider composed of controlled subtractor cells.

38 Fig Nonrestoring array divider built of controlled add/subtract cells.

39 Sequential Dividers with Carry-Save Adders

40 Fig Block diagram of a radix-2 divider with partial remainder in stored-carry form.

41 Fig Block diagram of radix-r divider with partial remainder in stored-carry form. Process to derive the details: Radix r Digit set [– ,  ] for q –j Number of bits of p (v and u) and d to be inspected Quotient digit selection unit (table or logic) Multiple generation/selection scheme Conversion of redundant q to 2’s complement Radix r Divider

42 Pentium bug (1) October 1994 Thomas Nicely, Lynchburg Collage, Virginia finds an error in his computer calculations, and traces it back to the Pentium processor Tim Coe, Vitesse Semiconductor presents an example with the worst-case error c = / Pentium = Correct result = November 7, 1994 Late 1994 First press announcement, Electronic Engineering Times

43 Pentium bug (2) Intel admits “subtle flaw” Intel’s white paper about the bug and its possible consequences Intel - average spreadsheet user affected once in 27,000 years IBM - average spreadsheet user affected once every 24 days Replacements based on customer needs Announcement of no-question-asked replacements November 30, 1994 December 20, 1994

44 Pentium bug (3) Error traced back to the look-up table used by the radix-4 SRT division algorithm 2048 cells, 1066 non-zero values {-2, -1, 1, 2} 5 non-zero values not downloaded correctly to the lookup table due to an error in the C script

45

46 Multiply/Divide Unit

47 The control unit proceeds through necessary steps for multiplication or division (including using the appropriate shift direction) Fig Sequential radix-2 multiply/divide unit. The slight speed penalty owing to a more complex control unit is insignificant Multiply-Divide Unit

Learn to deal with approximations In digital arithmetic one has to come to grips with approximation and questions like: –When is approximation good enough –What margin of error is acceptable Be aware of the applications you are designing the arithmetic circuit or program for Analyze the implications of your approximation

Calculators u = 10 times v = 2 1/1024 = = x = (((u 2 ) 2 )…) 2 = times x’ = u 1024 = y = (((v 2 ) 2 )…) 2 = times y’ = v 1024 = Hidden digits in the internal representation of numbers Different algorithms give slightly different results Very good accuracy

DIGITAL SYSTEMS DESIGN Concentration advisors: Kris Gaj 1.ECE 545 Digital System Design with VHDL (Fall semesters) – K. Gaj, project, FPGA design with VHDL, Aldec/Synplicity/Xilinx/Altera 2. ECE 645 Computer Arithmetic (Spring semesters) – K. Gaj, project, FPGA design with VHDL or Verilog, Aldec/Synplicity/Xilinx/Altera 3. ECE 586 Digital Integrated Circuits (Spring semesters) – D. Ioannou 4. ECE 681 VLSI Design for ASICs (Fall semesters) – N. Klimavicz, project/lab, front-end and back-end ASIC design with Synopsys tools 5. ECE 682 VLSI Test Concepts (Spring semesters) – T. Storey, homework

Follow-up courses Computer Arithmetic ECE 645 ECE 746 Advanced Applied Cryptography (Spring 2012 or 2013) ECE 646 Cryptography and Computer Network Security (Fall 2011) ECE 899 Cryptographic Engineering (Spring 2012)

Cryptography and Computer Network Security Advanced Applied Cryptography AES Stream ciphers Elliptic curve cryptosystems Random number generators Smart cards Attacks against implementations (timing, power, fault analysis) Efficient and secure implementations of cryptography Security in various kinds of networks (IPSec, wireless) Zero-knowledge identification schemes Historical ciphers Classical encryption (DES, Triple DES, RC5, IDEA) Public key encryption (RSA) Hash functions and MACs Digital signatures Public key certificates PGP Secure Internet Protocols Cryptographic standards Modular integer arithmetic Operations in the Galois Fields GF(2 n )

Selected Topics  True Random Number Generators  Fast Finite Field Multiplication  Elliptic and Hyperelliptic Curve Cryptography  Instruction Set Extensions for Cryptographic Applications  FPGA and ASIC Implementations of AES  Secure and Efficient Implementation of Symmetric Encryption  Block Cipher Modes of Operation in Hardware  Basics of Side-Channel Analysis  Improved Techniques for Side-Channel Analysis  Electromagnetic Attacks and Countermeasures  Microarchitectural Attacks and Countermeasures (cache attacks)