1 Serial Powering for Silicon Strip Detectors at SLHC Marc Weber (RAL), Giulio Villani (RAL), M. Lammentausta (Savonia Polytechnic Kuopio) The problem:  will have more channels (by factor 5 – 10) at SLHC due to increased occupancy (and replacement of ATLAS TRT by a silicon detector)  need more chips/hybrids and power lines  But space for services is very limited

2 You have seen serial powering before Power in Power out Power Supply Parallel powering Serial powering Not all connections are shown ! PS

3 Serial powering has obvious advantages e.g. it needs much less cables from power supply to detector Q: Why then have parallel powering at all ? A:  Can fine-tune module voltages  Can switch any defective module off, leaving others on  Minimum conductive interference between modules  “ Solid” common ground These are important requirements for a large scale detector system, which should be preserved by any powering scheme if at all possible

4 Advantages of serial powering  Much less cables (space, radiation length, costs)  Much less power burnt in cables (cooling)  Less power supplies (costs) Let’s check how this works in detail Disclaimer: what is shown in the next few slides follows the pioneering work of the Bonn group for the ATLAS Pixel detector see T. Stockmanns, P. Fischer, F. Hügging, I. Peric, Ö. Runolfsson, N. Wermes, Nucl. Instr. and Meth. A 511, (2003)

5 Outline  How does serial powering work ?  Why is it good ? A glance at ocable budget omaterial budget ocable/power supply cost opower efficiency  First experimental results with SCT modules  Future R&D program

6  one current source for a chain of modules; voltage defined by set of regulators  “ground levels” of any pair of modules vary  within a hybrid, chips are powered in parallel; analog ground, digital ground, and HV ground are tied together Serial powering Independent powering

7  module with maximum current consumption, determines current  if another module needs less current, excess current flows through power transistor  analog power is derived from digital power  resistors define voltage; for ABCD chip this is 4 V If regulator circuitry is integrated into future RO chips, programmable voltage control is desirable Shunt regulators (digital power) and linear regulators (analog power)

8 module and DAQ may operate at very different potential, but have to communicate (clock, command, data)  standard solution: optocouplers  here we copy the Bonn approach: AC coupling of LVDS signals  no DC connection between DAQ and module  feed-back resistor has two functions: o defines DC potential of input o latches input even after caps are discharged LVDS AC coupling

9 Note that there is a price to pay:  5 extra passive components + LVDS buffer per signal  in a real system, this must go on hybrid and chip  increased real estate and power  optocouplers probably require as much real estate and must be radiation-hard This area needs more thought and prototyping in a specific, more realistic application Just used trial and error rather than simulation to chose resistor and cap values so far, but it works

10 A look at cable and space issues Space constraints are main concern for ATLAS SLHC upgrade  bottle neck for services is region between tile calorimeter and tracker  This is filled to at least 95% for ATLAS tracker  Space is shared by cables and cooling tubes  only prudent assumption is that available space will not increase But will have much more channels at SLHC!

cables of SCT Barrel 3 Barrel 4: 480 cables; B5: 576; B6: 672; plus pixel and TRT !

12 A look at material issues  naively extrapolating from an SCT to an SLHC layer assuming 5 times more channels, we get (one layer, barrel, normal impact) : Material budget will explode at SLHC without innovations in powering, packaging, and cooling Component R.L. for SCT Scaling factor* R.L. for SLHC Cable0.2 %x 51 % Hybrid0.3 %x 51.5 % Sensor0.6 %x 10.6 % Cooling; CF cylinders; module baseboard; etc. 0.4; 0.3; 0.2 % x  3; x 1; x % Total2 %5 % Silicon fraction30 %12 % too big ! * crude estimate; no innovation

13 A look at material issues  services in ATLAS SLHC tracker would still run in gap between barrel and end cap detectors  in current SCT, particles cross  (0.1 to 0.45%) x √2 of R.L. of cables in gap alone (dep. on polar angle) a 5 or 10-fold increase of these numbers is prohibitive Material budget will explode at a SLHC tracker without innovation in powering; packaging and cooling DiscsBarrel Interaction point Cables Generic ATLAS SLHC Tracker Configuration

14 A look at power efficiency This discussion follows a note of Dave Lynn (BNL) Power efficiency is important. Least for energy bill, but to reduce load on cooling system, save material, and to reduce thermal stresses/instabilities New powering schemes at SLHC will not reduce our power budget compared to now, just avoid sky-rocketing

15 Let’s look at 4 different powering set-ups for a stave with n modules  Each module is independently powered (IP scheme)  Power busses on stave serve modules in parallel (PP)  Parallel, but with DC-DC conversion (DCP) …  Modules are chained in series (SP) Definitions: Module current and voltage: I, V Cable resistance (including return): R  power consumed by stave with n modules is always: n I V  power wasted in the cable varies with powering scheme Power efficiency M1 M2 M3 M1 M2 M3 M1 M2 M3

16 Power efficiency Ignoring effects of regulators and other complications, get easy dependencies Efficiency decreases with increasing R, I and decreasing V Significant advantage for serial powering and DC-DC, even for small numbers of modules n and small gain g I stave V drop V stave P cable P stave Efficiency: P stave /P total IP n In I RVn I 2 Rn I V1/[1 + IR/V] PP n In I RVn 2 I 2 Rn I V1/[1 + nIR/V] SP I I RnV I 2 Rn I V1/[1 + IR/nV] DCP (n/g) I (n/g) I R gV(n/g) 2 I 2 R n I V1/[1 + nIR/g 2 V]

17 Break-down of SCT Barrel power losses  one-way cable length: 160 m  cable resistance (incl. return): 3.5 Ω; ~1.5 Ω in active volume  typical module current: 1 A Total SCT power:  50 kW, 50% of which is lost in cables !

18 Example: ATLAS SCT Power efficiency ratio: SP/IP =

19 Example: ATLAS SLHC strip stave Put your own assumptions into this table !

20 Efficiency ratio: serial over parallel Efficiency increase is big ! (even for small number of modules) Note that this is a fair approximation which however ignores:  power used by regulators and other circuitry  Min. current is determined by power hungriest module (readout/digitization)  most modules see more current than needed SCT SLHC

21 A look at cost issues Cost savings are significant. R&D investment is marginal  SCT cable costs (4088 modules; 6 M channels):  2 MCHF (incl. HV)  SCT LV power supply costs:  1.5 M CHF  SLHC silicon strip tracker could have 60 M channels Assume factor 2 increase by replacing TRT with silicon; assume additional factor 5 due to SLHC luminosity (occupancy)  Parallel powering at SLHC would cost some tens of MCHF Serial powering will reduce this number by a factor 5-10

22 Redundancy Could lose complete chain of modules if serial power line is interrupted due to fault  this must not happen  protection What could go wrong ?  Broken bonds (trivial, but important) o multiple bonds/pads; bump-bonding; etc.  broken chip that needs to be shut-down o add auxiliary chip that acts as switch to next module ?! o make sure RO chips fail gently !? Systematic failure identification and protection is one of the main challenges (both for serial and parallel powering scheme with DC-DC conversion)

23 An example failure mechanism Failure on a hybrid leads to an open between module and regulator  regulator carries full module current  regulator burns out  all modules fail Possible protection: Sense overcurrent in regulator and lower drop voltage  less heat dissipation  no burn-out  stable short to next module ModuleShunt regulator X V I nominal operating point break-down; burn-out sense overcurrent and reduce voltage to avoid break down stable short to serve remaining modules with power

24 First experimental results with silicon strips  Took 4 ATLAS SCT modules  Connect modules in series using external commercial regulators and AC-coupled LVDS drivers on interface PCB (The schematics of the serial powering PCB are given in the appendix)  Compare noise performance of modules powered independently or in series You will see results in a minute… So far it looks very promising: system runs stably and noise performance does not change

25 Experimental set-up 4 SCT modules, serial powering PCBs, DAQ support cards SCT module 1 DAQ support card Serial powering PCB M4 M3 M2 DAQ support card Serial powering PCB 16 V 2 A

26 Photograph of serial powering PCB Shunt regulator AC LVDS data Analog regulator AC LVDS clock and command SCT module DAQ support card Will also build a miniaturized version of this with bare die components

27 Noise performance: indep. vs. serial powering Let’s look at noise occupancy (NO) with discriminator thresholds set to 1 fC Module 662 powered independently Noise performance remains excellent ! Module 662 powered in series with 3 others

28 Noise performance: independent powering vs. serial powering Independently powered | Powered in series This is a fraction of the runs taken; results are stable and consistent; the numerical noise occupancy values are given in the appendix Noise performance remains excellent

29  More studies on SCT module set-up omore noise tests e.g. introducing noise sources/ oscillations ocloser look into AC LVDS coupling  Build and study a more realistic system oDense packaging oGrounding and shielding issues oMiniaturized regulator circuitry oRedundancy features  Integration of serial powering circuitry into new silicon strip read out ASIC SLHC ID won’t happen without new powering scheme Best to start serious R&D now ! Future R&D Program CDF Run IIb stave

30 Appendix

31 Schematics of serial powering PCB

32 Noise performance: independent powering vs. serial powering Independently powered | Powered in series This is a fraction of the runs taken; results are stable and consistent Noise performance remains excellent