“TDAQ for 2012 runs” Gianluca Lamanna (CERN) Annual review meeting

Dry Run & Technical run Technical Run TDAQThe October Technical Run is a good opportunity to test the TDAQ structure and to readout data for detector calibration. complex systemThe TDAQ is a relatively complex system. all electronics equipments Dry RunJuly 15To better take advantage of the beam time available, it’s mandatory to test all electronics equipments that will be used in the technical run  Dry Run will start July 15 (for 1 month) no interferenceSome amendment to this law is possible in case of no interference with other systems.

TDAQ concepts same FPGAsFor most of the detectors the readout and the definition of trigger primitives is done with the same FPGAs. primitivesasynchronous trigger decision synchronous.The primitives trigger transmission is asynchronous while trigger decision transmission is synchronous. Data Trigger primitives TTC L1 requests 10 MHz 1 MHz L0TP TEL62 L1/L2 PCFARM detector Asynchronous Synchronous 100 kHz 10 kHz (1 ms max latency)

TDAQ for 2012 LAV FEE CEDAR board CHANTI board STRAW readout CFD board TDCB TEL62 SLM L0TP (TALK) LTU & TTCex TTC PCFarm Network Online software Run Control Front end electronics Readout & Trigger Data acquisition

Overview of 2012 runs TDAQ hardware # channels (in 2012) FEER/O CEDAR128CEDAR boardTDCB+TEL62 CHANTI46Chanti board + LAV FEE TDCB+TEL62 LAV480LAV FEETDCB+TEL62 STRAW~1800Cover Board + SRB TEL62 CHOD128LAV FEETDCB+TEL62 LKR~5000CPD+SLMPCs MUV288LAV FEETDCB+TEL62 MUV3296CFD+TRAMTDCB+TEL62 IRC/SAC8LAV FEETDCB+TEL62

LAV FEE board ToTToT (Time Over Threshold) with large dynamic range thresholdDouble threshold –Redundant front end –Slewing correction Control PC, pulser and signal sum 9U board with mezzanines – 32 input, 64 output 31 boards in production end of May –Ready and tested for the end of May DetectorLAVFEE CHANTI2 LAV15 CHOD4 MUV29 SAC/IRC1

CEDAR board NINO chips.“Amplificator-free” board to house NINO chips. last dinode.The differential signals are obtained using the last dinode % PM sockets end of may128+5% special PM sockets in production (end of may). middle of JulyThe final board design is started: final tested board ready for the middle of July. installed after Dry Run pulse NINOsSince the PMs will be installed after the Dry Run, a procedure to pulse the NINOs from the readout is foreseen.

CHANTI board CHANTICHANTI board: VbiasSiPM –Provides Vbias for SiPM amplification –Fast amplification currents –Reads currents (nA) for monitoring temperatures –Reads temperatures probes 4 channels prototype4 channels prototype has been built: –Standalone lab test passed –Test with the CHANTI prototype are ongoing end of JuneThe final board will be ready at the end of June CHANTI CHANTI board 32 Ch. LAV FEE board 32 Ch

STRAW readout Cover board SRBCover board and SRB (Straw Readout Board) prototypes are ready: June –Cover board final production in June June –SRB final prototype will be ready in June with a simplified version of the firmware. October –TEL62 daughter board prototype ready in October Technical Run VME fall back solutiondaughter boardIn the Technical Run the readout will be done using VME (fall back solution), in case the daughter board will not be ready. STRAW (1 view) SRB Cover board SRB … 30 boards per view… TEL62 daughter board VME

CFD CFD NA48 AKL MUV3The CFD (Constant Fraction Discriminator) coming from the NA48 AKL readout system will be reused for the MUV3 frontend this year 19 boards:We need 19 boards: 18 working boards –We have already 18 working boards (additional tests needed) additional boards July –We will produce few additional boards (3 or 4), probably ready in July TRAM JuneA level adaptor board (TRAM -TRAnslator for Muon veto ) will be ready in June MUV3 Patch panel CFD ECL->LVDS (TRAM board) TDCB/TEL62 RG58Lemo Flat cable TDCB cable EB24

TEL62 TEL62The TEL62 is a main board to digitize (using daughter boards), buffer data and to build trigger primitives. TELL1 board.It’s an evolution of the LHCb TELL1 board. 13 boards end of April.13 boards in production: will be ready at the end of April. after Easter.Special crates ordered will arrive after Easter. DetectorTEL62 CEDAR1 CHANTI1 LAV3 STRAW1 CHOD1 LKR/L03 MUV21 MUV31 SAC/IRC1

TEL62 Firmware prototype firmware readoutMay.A prototype firmware for the readout will be ready in May. trigger primitives manpowerThe firmware to produce trigger primitives depends on the manpower (see later).

TDCB TDCB board TEL62The TDCB board is a TEL62 mezzanine. HPTDC128 channels4 HPTDC for a total of 128 channels per board (512 per TEL62). 12 boards12 boards already distributed to sub-detectors groups. 12 additional boards end of April.12 additional boards will be ready at the end of April. DetectorTDCB CEDAR1 CHANTI1 LAV9 CHOD2 MUV22 MUV33 SAC/IRC1

SLM & TALK board 40% already Fastbus40% of the channels are already equipped with new Fastbus power supply. CREAM 2013The CREAM (Calorimeter REAdout Module) system will be ready in runs CPD SLM readout PCs.For the 2012 runs we will use the old readout (CPD (Calorimeter Pipeline Digitizer)) with the SLM (Smart Link Modules) to bring data inside readout PCs. trigger distribution TALKThe trigger distribution will be done using the TALK (Trigger Adaptor for LKr) board. PP SL TTC TAXI TALK FPGA To CPD to R/O PC TEL62

TALK board as L0TP TALK board 2012 runs L0TPThe TALK board will be used during the 2012 runs as L0TP (L0 Trigger Processor) FPGAEthernet LEMOsRJ11 LTU TEL62.FPGA, 5 Ethernet connectors, input/output LEMOs, RJ11 for choke/error, connector for the LTU (Local Trigger Unit), connection with the TEL62. ready and tested.The board is ready and tested. almost ready.The firmware is almost ready.

Triggering with TALK board Two ways: –With LEMO. primitives TEL62. –Using the primitives produced inside the TEL62. asynchronous primitives specific firmware TEL62The use of the asynchronous primitives is the baseline solution. This depends on the specific firmware inside the TEL62. fall back solution FEE boardsThe fall back solution will be done using the signals coming directly from the FEE boards. TEL62 TALK eth LAV TALK CHOD lemo

Trigger partition: LTU & TTCex L0TP TTC systemThe L0TP will communicate trigger decision through TTC system. LTU+TTCexoptical splittersThe trigger partition for each detector is composed by LTU+TTCex and optical splitters. LTU+TTCex2012 runs already produced distributedThe LTU+TTCex for 2012 runs has been already produced and distributed to the sub- detectors groups. firmwarecontrol softwareare completeThe firmware and the control software are complete.

Clock & Trigger distribution fibers clock & trigger this week. The fibers for clock & trigger distribution will be installed this week. copper cables choke/error The copper cables for choke/error will be installed after the fibers. CHEF has been designed June A board to make the control signals “local OR” (CHEF – CHoke and Error Fan in) has been designed and will be ready in June.

HP2910 PCFarm & Network 7 x HP2910 already7 x HP2910 already bought. HP82123 “8x10Gb/s” 1 “24x1 Gb/s” (middle of May).HP8212 ordered with 3 “8x10Gb/s” modules and 1 “24x1 Gb/s” module (middle of May). Six 12 cores PCsSix 12 cores PCs foreseen for this year (to partially test the switches): –2 already available. soon. –4 to be buy soon. 10 Racks (end of April).10 Racks with cooling door ordered (end of April). HP8212 PCFarm HP2910 HP Gb/s copper 10 Gb/s fiber

Readout software & Run Control Readout software almost readyend of April.Readout software almost ready: prototype at the end of April. Run Control EN/ICE groupPVSSSMI++ DIM.Run Control program in preparation in collaboration with the EN/ICE group: base on PVSS, SMI++ and DIM.

Summary Hardware JuneMost of the Hardware will be ready in June. readout firmware for TEL62 Mayhope to have asynchronous part man powerWe will have readout firmware for TEL62 in May. We hope to have the firmware to test the asynchronous part of the TDAQ system (it depends on man power). Network, trigger distribution and control lines April.Network, trigger distribution and control lines infrastructure will be completed in April. PCFarmsoftware MayThe PCFarm and the software will be tested in May.

SPARES

GPU Dry Run/Technical “demonstrator” TDAQDuring the Dry Run/Technical run we have the unique possibility to test a real “demonstrator” parasitically connected to the TDAQ. run efficiently GPU algorithms.We are preparing a framework to run efficiently GPU algorithms. CHOD corrections GPU.For this year we will try to make the CHOD corrections in the GPU. TEL62 firmware GPU.Some work is needed on the TEL62 firmware to send out reduced data for the GPU.

TRAM board Riccardo my selfThe schematic has been prepared by Riccardo and my self Mainz produce the boardMainz will take care to make the layout and to produce the board TRAnslator for Muon veto ECL  TTL  LVDSECL  TTL  LVDS 64 inputs TDCB standard cableEach board: 64 inputs on 4 cables, two TDCB standard cable in outputs 9U TEL629U TEL62 format (+5V, - 5V, +3.3V from the connector)

CHEF Board CHoke and Error Fan in 8 inputs3 outputs8 inputs, 3 outputs (one common output, two 4 channels output) VME 6U LKr1U format other detectorsVME 6U for LKr, 1U format (with external power supply) for other detectors LAVCEDAR, STRAW, RICH, MUV, LKrLAV (already in 2012), CEDAR, STRAW, RICH, MUV, LKr crate Patch panel CHEF

CHOD FEE CHODCHOD is evaluating two possibilities for the readout: NINO board –Florence NINO board with attenuation –LAV FEE (baseline) NINO board number of TDC channelsThe advantage to use the NINO board is in the number of TDC channels (128 instead of 256) isn’t enough NINOAn attenuation of ¼ isn’t enough to go in the linearity region of the NINO efficiencyA greater factor could affect the efficiency

LKr Trigger distribution TALK board LKr trigger distributionThe TALK board will be used for the LKr trigger distribution TAXI real systemThe TAXI has been tested in the Lab, we need to test it in the real system clock PECL TAXI receiver

TALK firmware

Data pulser LAVFEECEDAR FEE TDC cableBoth in LAVFEE and in the CEDAR FEE it’s possible to generate pulses using the last pair in the TDC cable. TEL62The TEL62 can trigger the pulser. TEL62  TDCB  FEE pre-decided L0TP trigger requestThe signal TEL62  TDCB  FEE is sent for pre-decided timestamps; at the same time the L0TP will produce a trigger request. LKr TALKFor the LKr the same things can be done using one TALK board output. Pulser TDCB TTC Data TEL62 L0TP Cedar NINO Board t TEL62 L0TP Timestamp: 0xA0A0A0A0 Send pulser signal to FEE Timestamp: 0xA0A0A0A0 Send calibration trigger request 1 ms