Arithmetic Functions BIL- 223 Logic Circuit Design Ege University Department of Computer Engineering

Iterative Arrays  Example: n = 32  Number of inputs = ?  Truth table rows = ?  Equations with up to ? input variables  Equations with huge number of terms  Design impractical!  Iterative array takes advantage of the regularity to make design feasible

Half Adder (1-bit) ABS(um)C(arry) Half Adder AB S C B A S B A C A B Sum Carry

Full Adder CinABS(um)Cout Full Adder AB S Carry Out (Cout) Carry In (Cin) Cin AB Cin AB

Full Adder A B Cin Cout S H.A. Cout S Half Adder S C A B Half Adder S C A B B A Cin

4-bit Ripple Adder using Full Adder Full Adder AB Cin Cout S S0 A0B0 Full Adder AB Cin Cout S S1 A1B1 Full Adder AB Cin Cout S S2 A2B2 Full Adder AB Cin Cout S S3 A3B3 Carry A B S C Half Adder A B Cin Cout S H.A. Full Adder

Half Subtractor(1-bit) ABDifference (D) Borrow (B) Half Subtractor AB DiffBorrow A B Diff Borrow

Full Subtractor Borrow (in) ABDifference (D) Borrow (out) Full Subtractor AB Difference BorrowOut (Bout) Borrow In (Bin)

4-bit Ripple Subtractor using Full Subtractor AB Bin Bout D D0D0 A0B0 AB Bin Bout D D1D1 A1B1 AB Bin Bout D D2D2 A2B2 Full Subtractor AB Bin Bout D D3D3 A3B3 Borrow Full Subtractor Full Subtractor Full Subtractor

Adder/Subtractor Design  A – B = A + (-B)  Take 2’s complement of B  Perform addition of A and 2’s complement of B Full Adder AB Cin Cout S S0 A0 Full Adder AB Cin Cout S S1 A1 Full Adder AB Cin Cout S S2 A2 Full Adder AB Cin Cout S S3 A3 B0B1B2B3 C Subtract

Overflow/Underflow (+72) (+57) +__________ (+129) 8-bit Signed number addition (-127) (-6) -_____________ (-133) 8-bit Signed number addition Cn-1 = 1 Cn = 0 Cn-1 = 0 Cn = 1 What is largest positive number represented by 8-bit? What is smallest negative number represented by 8-bit?

Overflow/Underflow Detection C n-1 A n-1 B n-1 S n-1 CnCn OF  Examine the MSB bit  Bottom line:  P: positive; N: negative  N + N = N  P + P = P  P+N or N+P always fall into the range  E.g P cannot be smaller than -128 or bigger than 127  Problem lies in  N+N = P  P+P = N Discarded

Overflow/Underflow Detection C n-1 A n-1 B n-1 S n-1 CnCn OF Discarded

Overflow/Underflow Detection AB Cin Cout S S0 A0B0 AB Cin Cout S S1 A1B1 AB Cin Cout S S2 A2B2 AB Cin Cout S S3 A3B3 Carry Overflow/ Underflow n-bit Adder/Subtractor Overflow/ Underflow Cn Cn-1

Design by Contraction  Contraction is a technique for simplifying the logic in a functional block to implement a different function  Contraction of a ripple carry adder to incrementer for n = 3  Set B = 001

Unsigned Integer Multiplier (2-bit) s carry carry out p0 a0b0 H.A. p1 c s a1b0 a0b1 H.A. c s p2p3 a1b1

Unsigned Integer Multiplier (3-bit) p0 a0b0 s F.A. p1 a1b0a0b1 0 co s ci c F.A. p2 s a2b0 a1b1 co s ci c F.A. s co s ci a0b2 00 c F.A. p3 a2b1 co s ci c F.A. co s ci a1b2 0 s s s c p4 c F.A. co s ci a2b2 p5

Multiplication by a Constant  Multiplication of B(3:0) by 101 B 1 B 2 B B 0 B 1 B 2 B 3 Carry output 4-bit Adder Sum B 0 C 0 C 1 C 2 C 3 C 4 C 5 C 6