Front End DAQ for TREND

2 Introduction: analog part 2015, feb 10 th

3 Synoptics 2015, feb 10 th

4 Components The filter –Custom made –50 Ω 30 MHz 110 MHz -40dB 2015, feb 10 th

5 The active components The power detector –The heart of the system, AD8310 –DC to 440 MHz, log detector That’s an envelope detector –40µV to 2V, low cost, small size The comparators – AD8612, dual high speed (4 ns, 100 MHz input) Output buffer – AD8138, 320 MHz BW, Slew rate 1150V/µs Adapt the ADC (bipolar inputs) Adjust the zero level 2015, feb 10 th

6 Other components The bias tee –Feed the active antennas through the coaxial cable The power supply –Provide differents voltage from the AC supply 2015, feb 10 th

7 Some controls We can, by software: –Stop the active antenna –Choose to read either a 50Ω pure resistor or the antenna signal –Switch off the power detector So we can disconnect a noisy channel 2015, feb 10 th

Trigger logic 3 independant comparators for the 3 antenna channels 3x2 Mvalues ± th i controled through FPGA. FPGA reads the 3 ADCs for one trigger on any channel. Trigger locked during ADC reading (10nsx400 cells = 4µs) 2015 feb 10 th 8

2015, feb 10 th 9 Status A prototype card is made –Filters are still missing due to administrative problems –But the chain is working with input generator Test card Room for filter

2015, feb 10 th 10 Backup

2015, feb 10 th 11 Some specs of the power detector Amplitude response Linearity (in dB)

2015, feb 10 th 12 Diagram of the analog part