Lattice-Based Computation of Boolean Functions Mustafa Altun and Marc Riedel University of Minnesota.

Slides:



Advertisements
Similar presentations
Boolean Algebra and Logic Gates
Advertisements

Presented by: Ms. Maria Estrellita D. Hechanova, ECE
Three Special Functions
Number Grid Task Task 1Task 2Task 3Task 4 Task 5Task 6Task 7Task 8 Task 9Task 10 NC Level 5 to 8.
10/4-6/05ELEC / Lecture 111 ELEC / (Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits.
Spring 07, Feb 13 ELEC 7770: Advanced VLSI Design (Agrawal) 1 ELEC 7770 Advanced VLSI Design Spring 2007 Binary Decision Diagrams Vishwani D. Agrawal James.
Proof: Synthesize cubes so that cube c k has n − i k literals and cubes c k and c l are disjoint, for any 0 ≤ k < l ≤ λ − 1. Weikang Qian and Marc D. Riedel.
1 COMP541 Combinational Logic Montek Singh Jan 16, 2007.
SYEN 3330 Digital SystemsJung H. Kim Chapter SYEN 3330 Digital Systems Chapter 2 -Part 2.
1 Exact Two-Level Minimization of Hazard-Free Logic with Multiple Input Changes Montek Singh Tue, Oct 16, 2007.
Weikang Qian The Synthesis of Stochastic Logic to Perform Multivariate Polynomial Arithmetic Abstract Ph.D. Student, University of Minnesota Marc D. Riedel.
Cardinality & Sorting Networks. Cardinality constraint Appears in many practical problems: scheduling, timetabling etc’. Also takes place in the Max-Sat.
Propositional Calculus Math Foundations of Computer Science.
ELE 523E COMPUTATIONAL NANOELECTRONICS
Combinational Digital Circuits. Measurement Our world is an analog world. Measurements that we make of the physical objects around us are never in discrete.
Lecture 8 Topics –Switch –Transistor –CMOS transistor –Logic gates AND, OR, NOT Universal gates: NAND, NOR XOR.
Gate Circuits and Boolean Equations BIL- 223 Logic Circuit Design Ege University Department of Computer Engineering.
Digital Logic Lecture 08 By Amr Al-Awamry. Combinational Logic 1 A combinational circuit consists of an interconnection of logic gates. Combinational.
BOOLEAN FUNCTION PROPERTIES
CHAPTER 2 Boolean Algebra
Nanoscale Digital Computation Through Percolation Mustafa Altun Electrical and Computer Engineering DAC, “Wild and Crazy Ideas” Session ─ San Francisco,
1 Simplification of Boolean Functions:  An implementation of a Boolean Function requires the use of logic gates.  A smaller number of gates, with each.
1 Section 10.2 Boolean Algebra Motivation: Notice the list of corresponding properties for the algebra of sets and the algebra of propositional wffs. These.
Copyright 2013, 2010, 2007, Pearson, Education, Inc. Section 3.7 Switching Circuits.
Slide Copyright © 2009 Pearson Education, Inc. 3.7 Switching Circuits.
Combinational Logic 1.
Discrete Mathematics and Its Applications.  The English mathematician George Boole ( ) sought to give symbolic form to Aristotle's system of.
Dr. Eng. Farag Elnagahy Office Phone: King ABDUL AZIZ University Faculty Of Computing and Information Technology CPCS 222.
Digital Logic Problems (II) Prof. Sin-Min Lee Department of Mathematics and Computer Science.
Computing with Defects
Figure 2.6. A truth table for the AND and OR operations. 2.3 Truth Tables 1.
Section 3.4 Boolean Algebra. A link between:  Section 1.3: Logic Systems  Section 3.3: Set Systems Application:  Section 3.5: Logic Circuits in Computer.
COMPUTER ARCHITECTURE TRUTH TABLES AND LOGIC GATES.
Chapter 4 Fundamentals of Computer Logic 1 Chapter 4: Fundamental of Computer Logic - IE337.
ELE 523E COMPUTATIONAL NANOELECTRONICS W10: Defects and Reliability, 16/11/2015 FALL 2015 Mustafa Altun Electronics & Communication Engineering Istanbul.
ECE 171 Digital Circuits Chapter 4 Boolean Algebra Herbert G. Mayer, PSU Status 2/1/2016 Copied with Permission from prof. Mark PSU ECE.
Output Grouping-Based Decomposition of Logic Functions Petr Fišer, Hana Kubátová Department of Computer Science and Engineering Czech Technical University.
Marc Riedel Associate Professor, Electrical and Computer Engineering University of Minnesota ITA – Feb. 14, 2014 (“Singles’ Awareness Day”) Probability.
BDS – A BDD Based Logic Optimization System Presented by Nitin Prakash (ECE 667, Spring 2011)
Boolean Algebra. BOOLEAN ALGEBRA Formal logic: In formal logic, a statement (proposition) is a declarative sentence that is either true(1) or false (0).
NAND, NOR, and EXOR (more primitive logical gates) CS Computer Architecture David Mayer.
Synthesis and Optimization of Switching Nanoarrays Muhammed Ceylan Morgul Mustafa Altun, PhD Istanbul Technical University.
Digital Logic & Design Dr. Waseem Ikram Lecture 09.
1 Digital Logic Design (41-135) Chapter 6 Combinational Circuit Building Blocks Younglok Kim Dept. of Electrical Engineering Sogang University Spring 2006.
IT 60101: Lecture #121 Foundation of Computing Systems Lecture 13 Trees: Part VIII.
Fundamentals of Logic Design, 7 th editionRoth/Kinney © 2014 Cengage Learning Engineering. All Rights Reserved. 1 Boolean Algebra (continued) UNIT 3.
Boolean Algebra & Logic Gates
CHAPTER 3 Simplification of Boolean Functions
ECE 301 – Digital Electronics
A question of science Circuit Symbols
Combinational Logic Circuits
Gate Circuits and Boolean Equations
CHAPTER 2 Boolean Algebra
CHAPTER 2 Boolean Algebra This chapter in the book includes:
Boolean Expressions Lecture No. 10.
Topic1: Boolean Algebra José Nelson Amaral
TN 221: DIGITAL ELECTRONICS 1
ECE/CS 352 Digital Systems Fundamentals
ELE 523E COMPUTATIONAL NANOELECTRONICS
Instructor: Alexander Stoytchev
COMS 361 Computer Organization
Lattice-Based Computation of Boolean Functions
Lecture 5 Binary Operation Boolean Logic. Binary Operations Addition Subtraction Multiplication Division.
Seating “chart” Front Back 4 rows 5 rows 5 rows 4 rows 2 rows 2 rows
{(1, 1), (2, 4), (3, 9), (4, 16)} one-to-one
Section 3.7 Switching Circuits
Truth tables Mrs. Palmer.
Introductory Concepts
Boolean Algebra S.SADHISH PRABHU.
Presentation transcript:

Lattice-Based Computation of Boolean Functions Mustafa Altun and Marc Riedel University of Minnesota

Switch-based Boolean computation Shannon’s work: A Symbolic Analysis of Relay and Switching Circuits(1938)

1D and 2D switches

A lattice of 2D switches 3 × 3 2D switching network and its lattice form

Boolean functionality and paths  Switches are controlled by Boolean literals.  f L evaluates to 1 iff there exists a top-to-bottom path.  g L evaluates to 1 iff there exists a left-to-right path.

Logic synthesis problem How can we implement a given target Boolean function f T with a lattice of 2D switches? Example: f T = x 1 x 2 x 3 +x 1 x 4

Logic synthesis problem Example: f T = x 1 x 2 x 3 +x 1 x 4 +x 1 x 5 9 TOP-TO-BOTTOM PATHS!

Our synthesis method Example: f T = x 1 x 2 x 3 +x 1 x 4 +x 1 x 5 f T D = (x 1 +x 2 +x 3 )(x 1 +x 4 )(x 1 +x 5 ) f T D = x 1 + x 2 x 4 x 5 + x 3 x 4 x 5  Obtain the dual of f T.  Assign each product of f T to a column.  Assign each product of f T D to a row.  Compute an intersection set for each site.  Arbitrarily select a literal from an intersection set and assign it to the corresponding site.

Our synthesis method

Math behind the method – Theorem 1 Theorem 1 allows us to only consider column-paths. We do not need to enumerate all paths!

Math behind the method – Theorem 2 Theorem 2 explains the relation between intersection sets and column-paths. Each column is for each product!

Our method’s performance Area of the lattice: m×n The time complexity: O(m 2 n 2 ) n and m are the number of products of the target function f T and its dual f T D, respectively.

Future work  We are investigating our method’s applicability to different technologies.  We are studying the applicability of the Theorems to the famous problem of testing whether two given monotone Boolean functions are mutually dual.

Thank you!