Design and Analysis of Real-Time Software REal TIme System Laboratory Scuola Superiore S.Anna G. Lipari E. Bini Ericsson Lab Italia C. Vitucci

Outline Introduction to RT embedded systems characteristics problems state of the art RT system research at Retis Lab Goal of this research Methodology Phases

Goal of this research Methodology for the design and analysis of Real-Time Embedded applications to be used in all phases of development

Starting Point Real Time embedded applications car controller hand-held computers cellular phone next generation cellular phones (UMTS) wearable computers etc. The target application telecommunication control board

RT embedded applications Limited resources memory CPU speed power consumption Dedicated HW Temporal constraints Applications must react to external environment in a timely manner Internal constraints (buffer size, interrupt handling, etc.)

RT design and analysis Support temporal determinism: providing kernel-level services priority-based schedulers bounded delay on system calls providing tools for off-line analysis a tool for specification in a formal (or semi-formal) language a tool for timing analysis a tool for testing

Application model Application on a single processor there are low-level control tasks (driver ATM etc.) and high-level control tasks (signaling) need to verify the temporal constraints on every task/activity A task can be activated periodically (time driven) by external events (event driven) Tasks communicate through messages

RTOS and HW OSE Delta currently used in Ericsson for developing software for RT embedded applications based on a message passing communication mechanism HW usually, a single processor board many different processor can be used performance strongly depends on the HW

Application model Unit -> set of tasks HW

Temporal constraints Period = 5 msec MIT = 10 msec Deadline = 150 msec

State of the art In the engineering practice no a-priori timing analysis is done low-level control tasks are directly coded in C or assembler often, the code of high-level control tasks is automatically generated by tools that do not consider temporal constraints temporal constraint are verified only during the testing phase

State of the art RT Analysis RT research focused on time-driven control applications schedulability conditions for periodic task sets Few research papers on RT analysis of reactive (event driven) systems Commercial tools: Time Wiz Rate Monotonic analysis non-std notation for specification

State of the art: RT notations Existing notations HRT-HOOD (used in aerospace applications) ROOM (from Object Time, now Rational Software) Not suitable for our purposes UML is a good candidate notation A preliminary proposal to OMG for a standard RT extension to UML has been made in Aug proponents: TimeSys, I-Logix, Rational Software, etc.

Problems Few tools integrate specification and analysis Time Wiz of TimeSys is one of the few The greatest problem is to estimate the worst case computation time of every activity strongly depends on the HW existing tools cover a narrow range of HW configurations There is the need for a tool that covers the entire development cycle at design time, with a proper RT notation after development, with a RT analysis

Summary Many different tools for RT-analysis (Time Wiz) for RT specification (Rational Rose RT) for WCET analysis (VCC) no easy-to-use off-the-shelf solution there is the need to integrate different of technologies specification of RT systems RT analysis WCET computation etc.

Research at Retis Lab ASI project Intecs definition of a HRT-UML notation enhancing UML-nice with RT-analysis MADESS project Parades, Magneti Marelli, ST microelectronics RT kernel for embedded controllers with minimal memory requirements RT kernel for multi-processor system-on-a-chip

Goal of this research A methodology for the design and analysis of RT embedded applications Specification (RT-UML) Code templates Implementation WCETRT analysis Consistency check Code analizer Testing

Phases Model of a OSE-Delta process Mapping to the appropriate RT-UML notation RT analysis on the model consistency check timing analysis priority assignment Integrating WCET computation