VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NET-IT TOWER DATA ACQUISITION AND DATA TRANSPORT ELECTRONICS CARLO A. NICOLAU ON BEHALF OF THE KM3NET – ITALY COLLABORATION Outline: KM3NeT-Italy Layout Tower Layout Data and Timing Link Floor Electronics Optical Module Electronics Conclusions

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics 375 VDC KM3NeT – IT Layout Shore Laboratory in Capo Passero harbour Control Room Guest House DAQ Power Feeding Equipment ON-SHOREOFF-SHORE 20 x opt. fibers up to 10 kV ~100 km MVC Opt. Splitter Junction Box Junction Box KM3NeT String DUs TB FCM KM3NeT-IT Towers KM3NeT-IT Towers

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Tower Layout TB FCM Tower Base Floor #1 Floor #2 Floor #13 Floor #14 Junction Box 375 VDC 2 opt. fibers Detection Unit Characteristics Design based on NEMO All data to shore approach Tower 14 Floors Vertical floor spacing is 20m Star connection topology Base Module Optical link distribution DWDM Power control and distribution Floor 8 m long Floor Control Module Vessel 6 Optical Modules 2 Hydrophones Optical Module Single 10” PMT Front End Module LED Beacon (2 per floor)

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Tower Base TOWER BASE E MANIFOLD JUNCTION BOX E O O FLOOR 1 FLOOR 14 E O ELECTRONICS POD POWER POD PHOTONICS POD E O Tower Base Module Contains 3 vessels Photonics Pod MUX/DEMUX lambdas from/to floors Power Pod Distribution, Control, Monitoring Electronics Pod Communication, Monitoring, Laser beacon control uC AD V-I Monitor 375 V F1F2 …. F14 Power Pod Photonics Pod DROP ADD Opt Amp Opt Amp BTS To Floors & E. Pod From Floors & E. Pod Electronics Pod Tower Base Control Module Board (same as Floor) PSS Board 375 V Power Pod RS232 Photonics Pod RS232 Hydrophone AES3 Laser Beacon Controller

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Floor Layout FCM KM3NeT-IT Floor KM3NeT-IT Floor To/from other 5 OMs To/from 2 x Digital St. Hydr. Front End Module Board HV PSU Optical Module Optical Module Center - Floor Vessel Center - Floor Vessel PSS Board Floor Control Module Board 375 V To/from Tower Base Power, Clock Data IN/OUT 12V, Clock AES3

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Data & Timing Link Model GPS GPS Time Distribution DWDM MUX DWDM MUX ~100km FCM KM3NeT-IT Floor KM3NeT-IT Floor Point to point link Each Floor is assigned a couple of lambdas (rx/tx) in DWDM spectrum Standard component Lambda drift monitoring and tuning Fully synchronous link Clock, Data and Timing embedded in a single 8b/10b stream Each device is time-stamp aware Fixed latency Round-trip time monitoring + pre-deployment calibration GPS Time Distrib. FCMFEM Phase Noise Jitter Lab Measures (Agilent E5052B SSA) Phase Noise Jitter Lab Measures (Agilent E5052B SSA) 10 MHz 38.5 ps rms 80 MHz 9.7 ps rms Recovered 80 MHz 35.2 ps rms Sampling Clock 200 MHz 52.3 ps rms DAQ FPGA (short)

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Center Floor Electronics OM #0 RS232 Port Compass (+3.3V) RS232 Port Compass (+3.3V) RS232 Port Ext Instrument (Isolated, +12V) RS232 Port Ext Instrument (Isolated, +12V) 2 x Digital AES3 Hydrophone 2 x Digital AES3 Hydrophone Spare RS232 Port (Isolated, +12V) Spare RS232 Port (Isolated, +12V) OM #1 OM #2 OM #3 OM #4 OM #5 375 V Power Connectors 1.2 V, 3.3 V, 5 V, 12 V (V & I Measurement) Spartan 6 FPGA Fixed-latency transceiver No external PLL 6 x OM interfaces (clock distribution, data rx / tx), 2 x AES3 Host a microblaze-based system on-chip Slow control communication Slow-control functions (OM power control and monitoring) Voltage and Current Monitoring I2C bus, Serial Ports Flash Read/Write Full remote safe reprogrammability with multiboot (3 full images + data) Spartan 6 FPGA Fixed-latency transceiver No external PLL 6 x OM interfaces (clock distribution, data rx / tx), 2 x AES3 Host a microblaze-based system on-chip Slow control communication Slow-control functions (OM power control and monitoring) Voltage and Current Monitoring I2C bus, Serial Ports Flash Read/Write Full remote safe reprogrammability with multiboot (3 full images + data) Power Supply System Floor Control Module H/T Sensor H/T Sensor DC/DC Converters 375 V -> 5 V 5 V -> 12 V 5 V -> 1.2V, 2.5V, 3.3V

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Optical Module Layout HV PSU CLOCK DIN / VCC DOUT / GND TO/ FROM FCM USER CONN (Power, AIN, GPIO, I2C, RS232,...) GATE In PMT signal HVPSU Power Control Feedback LED Beacon Power Trigger Front End Module Front End Module PMTLPF ADC 14 bit 200 Mhz L0-Trig rising and falling thresholds FIFO 2048 Samples + timestamp Timestamping 8b/10b enc. To FCM 20 Mbps Data Acquisition Chain current pulses ~3 ns rising time voltage pulses ~15 ns rising time Samples 14 bit / 200 Mhz Timestamp (5 ns) + Samples Events: Timestamp (5 ns) Waveforms

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Front End Module Analog Front End Differential shaping filter Linear Fully passive Adjustable Offset Analog Front End Differential shaping filter Linear Fully passive Adjustable Offset T/H I2C sensor Slow DACs/ADCs AFE conditioning (pedestal) HVPSU Control / monitoring LED-Beacon control Slow DACs/ADCs AFE conditioning (pedestal) HVPSU Control / monitoring LED-Beacon control LED Beacon V DC/DC based generator (24V) LED Beacon V DC/DC based generator (24V) Clock out driver DC/DCs LMZ10501 Line Interface Clock (LVDS) DATA IN/OUT (LVDS) GND/VCC on COM Line Interface Clock (LVDS) DATA IN/OUT (LVDS) GND/VCC on COM Fast ADC TI ADS4149 Differential 200 MHz 14 bit Fast ADC TI ADS4149 Differential 200 MHz 14 bit Spartan 6LX25 FPGA Level 0 trigger (zero-skipping) Programmable threshold Programmable number of tail samples 2 ksample FIFO Timestamping Lossless compression on spe Line interface encode/decode Rate monitoring in realtime Sustained spe rate up to ~150kHz Microblaze-based SOC Full remote safe reprogrammability with multiboot (3 images + data) Spartan 6LX25 FPGA Level 0 trigger (zero-skipping) Programmable threshold Programmable number of tail samples 2 ksample FIFO Timestamping Lossless compression on spe Line interface encode/decode Rate monitoring in realtime Sustained spe rate up to ~150kHz Microblaze-based SOC Full remote safe reprogrammability with multiboot (3 images + data) DAQ Core FSL H/T Sensor Sensirion SHT21 H/T Sensor Sensirion SHT21 3 x Ext. Serial Ports Micron N25Q032 Flash Micron N25Q032 Flash I2C 16bit DAC 16bit ADC HVPSU Control & monitor uBlaze SPI UART 16bit DAC 16bit ADC AFE Control & Monitor AD bit/200MHz Config. AD bit/200MHz Config. 64kB

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Front End Module Data acquired by tower #0 in 2014/nov nhits : ~150k mean : 9.5 pC std : 6.2 pC spe peak ~1/4 spe Equivalent threshold Pedestal Linear analog frontend  fixed relation ADC channel vs input current ( ~ pC per ADC channel)

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Conclusions Dissipative linear voltage regulators Active low noise DC/DC 5 different boards 2 boards 7 processing units 3 architectures (Xilinx FPGA, Microchip PIC, Freescale DSP) 1 processing unit 1 architecture (Xilinx FPGA w/ uBlaze MCU) Previous Design (NEMO) KM3NeT-IT Dissipative linear voltage regulators Active low noise DC/DC 2 x 8 bit ADC (100 Msps) Non-Linear Analog Comp. Single ADC 14 bit Linear Front end 2 processing units 2 architectures (Xilinx FPGA, Freescale DSP) 1 processing unit 1 architecture (Xilinx FPGA w/ uBlaze MCU) Same codebase as FCM Floor Control Module Front End Module Easier code maintainance From VHDL / DSPASM / C To VHDL / C++ One common code-base for all slow-control functions and communication Simplified elaboration No need to “decompress” signals Simplified calibration process No need to calibrate each single FEM at different temperatures Reduced power consumption FEM : From ~2 W / OM To ~1 W / OM FCM: From ~7.5 W To ~3 W Simplified integration, lower cost

VLVnT 2015 – Very Large Volume Neutrino Telescope 14 – 16 September 2015, University “Sapienza”, Rome - Italy Carlo A. Nicolau – INFN Sez. Roma KM3NeT-IT Tower – Data Acquisition and Data Transport Electronics Thank You