PLX : Instruction Set Architecture Shih-Hsueh, Chang

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Introduction (1/3) What's PLX? PLX is a small, general-purpose, subword- parallel instruction set architecture (ISA) designed at Princeton University, Department of Electrical Engineering.Princeton University Department of Electrical Engineering PLX is designed to be a simple yet high- performance ISA for multimedia information processing.

Introduction (2/3) PLX History In Fall 2001, design goals and architecture for PLX were specified by Prof. Ruby B. Lee of Princeton University.Prof. Ruby B. Lee PLX 0.1 was encoded, documented, and implemented as a project for the ELE-572 Class during Spring 2001 by Princeton graduates R. Adler '01 and G. Reis '01.

Introduction (3/3) PLX 1.1 was released in February The software toolset includes an assembler, a compiler, and a simulator. Currently PLX 1.2 is being maintained and developed by PALMS.

PLX 1.1 Toolset assembler - contains the asm script, which is the PLX assembler benchmarks - contains the PLX benchmarks written in PLX assembly and C build - initially empty, this is where the binary executable for the simulator is built compiler - source code for the PLX compiler (see the README and INSTALL files in this directory for how to install the compiler) scripts - Perl scripts used to automate the build process simulator - source code for the PLX simulator ISA - contains the PLX architecture definition vhdl - contains the VHDL model for a PLX processor

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Instruction Set Architecture These ISAs exploit two properties of multimedia applications: Huge amounts of data parallelism Extensive use of low-precision data These two properties are exploited well by the use of subword parallelism.

Instruction Set Architecture Datapath is partitioned into multiple lower-precision segments called the subwords. All instructions are 32-bits long and subword sizes are 1, 2, 4 and 8 bytes.

Instruction Set Architecture The instructions operate in parallel on these subwords.

Instruction Set Architecture PLX instructions can be classified into three major groups : ALU instructions, shift and permute instructions, and multiply instructions.

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Datapath Scalability PLX can be implemented as a 32-bit, 64-bit or 128-bit architecture without any changes to the ISA.

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Predication All PLX instructions are predicated. Predicated reduces conditional branches. PLX has bit predicate registers organized into 16 predicate register sets of 8 predicate registers each. The registers in this set are numbered P0 through P7.

Predication (cont.) The predicate registers P1 to P7 can be set and cleared using compare instructions (P0 is always true). Only one set is active at any time. Active set changed in software. Only 3 bits required per instruction.

Predication (cont.) Two types of compare instructions set the predicate registers in PLX.

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

ALU instructions

Saturation arithmetic 一般的算術運算在 overflow 的時候, 並沒有特 別的處理, 通常是直接將最左邊的一個 bit 丟 棄. 在多媒體的應用程式中，綠色加綠色，我們預 期他會變成深綠色。但是要是發生 overflow ， 它可能變成很奇怪的顏色。 Saturation arithmetic, 使得綠色加綠色最多是 變成黑色，而不會變出什麼奇怪的顏色。

Low-cost multiplication Pshift [left|right] add instructions allow low-cost integer and fixed-point multiplication in the ALU without a separate multiplier.

pmax & pmin These instructions are very useful for sorting algorithms. pmax and pmin can perform a swap operation for multiple pairs of subwords in a single cycle.

PLX Allows Parallel Writing of Predicate Registers

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Shift and Permute instructions

shift right pair Two source registers are concatenated and shifted right. useful for entities that span two registers. when the same register is used, the result is a rotation of that register.

Mix right/left Mix instructions are very useful for performing matrix transposition.

Matrix Transposition

permute The permute instruction works on 1-byte and 2-byte subwords, and performs a small set of carefully selected permutation primitives.

permute variable To use a second source register to specify the permutation control bits. To perform any arbitrary permutation of 1-byte or 2-byt subwords, with or without repetitions of any subword.

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Multiply instructions

Pmultiply shift right right-shifts the products before writing the lower- order half of the bits to the destination register. allows selection of the desired 16-bits of each product. Pmultiply odd and pmultiply even only multiply the odd or even indexed subwords of the source registers produce full length products.

Outline Introduction Instruction Set Architecture Datapath Scalability Predication ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Other instructions PLX has load and store instructions for accessing memory. Program flow can be changed with jump instructions. This includes jump and link instructions for procedure calls. Conditional branches are achieved with predicated jump instructions.

Outline Introduction Instruction Set Architecture Predication Datapath Scalability ALU instructions Shift and Permute instructions Multiply instructions Other instructions Conclusion

Subword Parallelism Datapath Scalability Novel Definition of Predication Extended instructions for multimedia. Low cost and very high multimedia performance.