Introduction to FPGAs Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223.

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Presentation transcript:

Introduction to FPGAs Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223

The Basics SRAM Transistor 1 Open Closed 0

Configuration Comes at a Cost 4-6 T 1T SRAM + Configuration circuitry + Error detection/correction + Security features 6T SRAM 4T SRAM access_memory

Lookup Tables (LUTs) SRAM x y Commercial FPGAs Xilinx: 6-LUT Altera: 6-LUT Microsemi: 4-LUT

LUT = Programmable Truth Table A B C D x y z x y z 0 0 A 0 1 B 1 0 C 1 1 D

AND x y z x y z

OR x y z x y z

NAND x y z x y z

NOR x y z x y z

XOR x y z x y z

XNOR x y z x y z

z = y x y z x y z

z = y + x x y z x y z

Basic Logic Element (BLE)

Configurable Logic Block (CLB)

FPGA

FPGA CAD Flow Input: – A circuit (netlist) Output: – FPGA configuration bitstream Main (Algorithmic) Stages: – Logic optimization – Technology mapping – Packing/placement – Routing – Retiming

Technology Mapping Ling et al., DAC 2005, Fig. 2

Technology Mapping + Logic Optimization Cong and Minkovich, IEEE TCAD 26(2), Feb. 2007, Fig. 1

FPGA Packing Ahmed et al., ACM TRETS 2(3), article #18, Sep. 2009, Fig. 12 Assume that each CLB contains two BLEs

FPGA Placement

FPGA Routing

Retiming Each cloud represents a BLE along the circuit’s critical path Remember, routing delays between clouds are significant, and you don’t know them until AFTER placement and routing are done.

Introduction to FPGA Design J. Serrano, CERN, Geneva, Switzerland

Typical Digital Design

FPGA Structure

Signal Processing: CPU vs. FPGA

Speed/Area Tradeoff

Fixed-Point Arithmetic In this example Two’s complement (signed) 3 integer bits 5 fractional bits

Truncation vs. Rounding in Fixed-Point

Distributed Arithmetic X b [n] is 0 or 1 Shift c[n] left by b

c[n] or 0 (c[n] << 1) or 0 (c[n] << 2) or 0 (c[n] << 3) or 0 X 0 [n] X 1 [n] X 2 [n] X 3 [n] Distributed Arithmetic

Distributed Arithmetic Architecture

Course Topics FPGA architectures – Academic (VPR) – Commercial (Xilinx / Altera / Microsemi) FPGA CAD algorithms Compilers (e.g., C, OpenCL, etc. to FPGA) FPGA Applications Reconfigurable alternatives to FPGAs The history of reconfigurable computing – Going back to the vacuum tube era