ECE 447: Lecture 12 Logic, Arithmetic, Data Test and Control Instructions of MC68HC11

ECE 447: Groups of Instructions (1) 1. Data handling instructions a. Move instructions (e.g., load, store, exchange) b. Alter data instructions (e.g., clear, increment, decrement) c. Edit instructions (e.g., shift, rotate) 2. Logic instructions (e.g., and, or, xor) 3. Arithmetic instructions (e.g., add, subtract, multiply, divide, negate)

ECE 447: Groups of Instructions (2) 4. Data test instructions (e.g. compare, test, bit test) 5. Control instructions (e.g., jump, branch) 6. Condition code instructions (e.g., set carry, clear overflow flag) 7. Stack operations (e.g. push, pull)

ECE 447: Groups of Instructions (3) 8. Subroutine-related instructions (e.g. jump to subroutine, return from subroutine) 9. Interrupt-related instructions (e.g. software interrupt, return from interrupt, wait for interrupt) 10. Miscellaneous instructions (e.g. no operation, stop)

ECE 447: Move Instructions (1) 1. memory  register LDA[A, B] M LD[D, X, Y, S] M 2. register  memory STA[A, B] M ST[D, X, Y, S] M 3. register  register TAB, TBA 4. memory  memory IMM, DIR, EXT, IND DIR, EXT, IND INH N Z V C 0 –

ECE 447: Move Instructions (2) 1. register  register XGD[X, Y] N Z V C – – INH

ECE 447: Alter Data Instructions (1) 1. 0  register CLR[A, B] 2. 0  memory CLR M EXT, IND INH N Z V C

ECE 447: Alter Data Instructions (2) 3. increment X++ INC[A, B] INC M IN[X, Y] 4. decrement X-- DEC[A, B] DEC M DE[X, Y] – INH EXT, IND INH – – – INH EXT, IND INH – – – – N Z V C

ECE 447: Logic Instructions (1) 1. AND Acc & M  Acc AND[A, B] M 2. OR Acc | M  Acc ORA[A, B] M 3. XOR Acc  M  Acc EOR[A, B] M IMM, DIR, EXT, IND N Z V C IMM, DIR, EXT, IND 0 –

ECE 447: Logic Instructions (2) 3. complement X  X COM[A, B] COM M 4. bit set M | mask  M BSET M, mask 5. bit clear M & mask  M BCLR M, mask INH EXT, IND N Z V C DIR, IND – DIR, IND

ECE 447: Arithmetic Instructions (1) 1. addition Acc + M [+ C]  Acc ADD[A, B, D] M ADC[A, B] M 2. subtraction Acc – M [-C]  Acc SUB[A, B, D] M SBC[A, B] M IMM, DIR, EXT, IND N Z V C IMM, DIR, EXT, IND

ECE 447: Arithmetic Instructions (2) EXT, IND INH 3. negation -X NEG[A, B] NEG M 4. addition Reg + B  Reg ABA AB [X, Y] 5. subtraction A – B  A SBA INH – –

ECE 447: Signed vs. Unsigned B = b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 Unsigned number Signed number B = b 7 b 6 b 5 b 4 b 3 b 2 b 1 b weights B = b b b b b b b b =bi2ibi2i  i=0 7 B = b b b b b b b b = - b bi2ibi2i  i=0 6

ECE 447: 2’s Complement Representation X k=4 X>00X<0 X+2 k = X+1 0

ECE 447: Unsigned vs. Signed Addition Machine Programmer Unsigned mind Signed mind weight carry XYSXYS + = FA x0x0 y0y0 s0s0 c1c1 x1x1 y1y1 s1s1 c2c2 x2x2 y2y2 s2s2 c3c3 x3x3 y3y3 s3s3 c4c4 x4x4 y4y4 s4s4 c5c5 x5x5 y5y5 s5s5 c6c6 x6x6 y6y6 s6s6 c7c7 x7x7 y7y7 s7s7 c8c8

ECE447: Definitions of CCR flags (1) Z = 1 if result = 0 0 otherwise Zero flag - Z N = sign bit of the result r 7 - for 8-bit operands r 15 - for 16-bit operands Negative flag- N zero result negative result

ECE447: Definitions of CCR flags (2) C = 1 if result > MAX_UNSIGNED or result < 0 (a borrow occurred) 0 otherwise where MAX_UNSIGNED = for 8-bit operands (registers A, B) for 16-bit operands (register D) V = 1 if result > MAX_SIGNED or result < MIN_SIGNED 0 otherwise where MAX_SIGNED = for 8-bit operands (registers A, B) for 16-bit operands (register D) MIN_SIGNED = -2 7 for 8-bit operands (registers A, B) for 16-bit operands (register D) Carry flag - C Overflow flag - V out-of-range for unsigned numbers out-of-range for signed numbers

ECE 447: Overflow of Signed Numbers Indication of overflow Positive + Positive = Negative Negative + Negative = Positive Formulas Overflow 2’s complement = x k-1 y k-1 s k-1 + x k-1 y k-1 s k-1

1. unsigned multiplication A x B  D MUL 2. unsigned divisionD/IX  IX D mod IX  D IDIV 3. unsigned fractional division D < IX (scaled by 2 16 ) D/ IX  IX (scaled by 2 16 ) D mod IX  D 4. decimal adjustment DAA ECE 447: Arithmetic Instructions (3) INH N Z V C INH – – – – 0 – FDIV INH ?

ECE 447: Sign Extension Extending the number of bits of a signed number x k-1 x k-2 … x 1 x 0 y k’-1 y k’-2 … y k y k-1 y k-2 … y 1 y 0 X Y two’s complement x k-1 x k-1 x k-1...x k-1 x k-2 … x 1 x 0

ECE 447: Data Test Instructions 3. test register TST[A, B] 0 INH IMM, DIR, EXT, IND 1. comparison R - M CMP[A, B] M CP[D, X, Y] M N Z V C INH 2. comparison A – B CBA

ECE 447: Data Test Instructions 0 –IMM, DIR, EXT, IND 4. test memory TST M 5. Bit test Acc & M BIT[A, B] M N Z V C 0 EXT, IND

ECE 447: Branch Instructions (1) REL N Z V C – – after comparison register vs. memory unsigned numberssigned numbers BHI higher > BLO lower < BHS higher or same  BLS lower or same  BGT greater than > BLT less than < BGE greater than or equal  BLE less than or equal  BEQ equal = BNE not equal 

ECE 447: Brach Instructions (2) after arithmetic operations (testing for overflow) unsigned numberssigned numbers BCS carry set BCC carry clear BVS overflow set BVC overflow clear BPL plus  0 BMI minus < 0 after testing register or memory unconditional BRA always BRN never

ECE 447: Bit test and branch instructions – – DIR, IND 1. Bit test and branch branch if (M & mask) == 0 BRCLR M, mask label – – DIR, IND 2. Bit test and branch branch if (M & mask) == 0 BRSET M, mask label