Instructor: Yuzhuang Hu
Design strategy in ASM
CISC Architecture The goal of the CISC architecture is to match more closely the operations used in programming language and to provide instructions that facilitate compact programs and conserve memory. A purely CISC architecture has the following properties: Memory access is directly available to most types of instructions. Addressing modes are substantial in number. Instruction formats are of different lengths. Instructions perform both elementary and complex operations.
Combined CISC-RISC Organization Instruction fetch Decode and operand fetch Execute Write-back Microprogram counter Control ROM
CISC CPU Instruction Formats OPCODEDRSASB OPCODEDRSAImmediate OPCODEDRSALarge target offset OPCODEDRSASBShort target offset Three register type Two register type Branch 1 Branch 2
Micro-programmed Control +1 MC MS MI MZ MZ-1 PS Z ME SACACA Mux E Address Microcode ROM Data MZCA MZ-1CA-1 DOF EX
Address Control
Load Indirect Indexed(LII) Action Add ress Microinistructions MZMZ CACA RWRW DXMDMD BSPSPS MWMW FSFS LCLC MAMA MBMB AXAX BXCXCX R16<- R[SA]+zf IM L LII MC<-MC+1 (NOP) LII R17<-M[R16]LII MC<- MC+1(NOP) LII R[DR]<- M[R17] LII4 10ID LE
A Personal Computer Screen Keyboard Hard drive Drive Controller Bus Interface RAM Processor Graphics Adapter CPU, FPU, MMU Internal Cache External Cache
Access Times Cache: 1 ns, memory: 10 ns, hard drive: 13 ms Assume that 95% of the fetches will be from a cache and about percent of the fetches will be from main memory. The average access time then is: 0.95* *10+5*10 -8 *1.3*10 7 =3.05ns
Locality of Reference Temporal Locality: refers to the relative times at which instructions and operands are accessed. Spatial Locality: refers to the relative locations at which they reside in main memory.
Write Methods Write the result into main memory. This is also called write-through. Write the result into the cache if there is a cache hit. This is also called write-back. write-allocate: when a cache miss happens, read the line containing the word to be written from main memory into the cache, with the new word written into both the cache and main memory. Dirty bit of a line.
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