Penn ESE370 Fall2010 -- DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 7: September 22, 2010 Delay and RC Response.

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Presentation transcript:

Penn ESE370 Fall DeHon 1 ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 7: September 22, 2010 Delay and RC Response

Delay is RC Charging Penn ESE370 Fall DeHon 2

Delay is RC Charging Understand switch state Break into stages For each stage –Understand R drive –Understand C load Penn ESE370 Fall DeHon 3

Today RC Charging RC Step Response What is the C? What is the R? Measuring Delay Delay model of gate Penn ESE370 Fall DeHon 4

90% Rise Time? Penn ESE370 Fall DeHon 5

What does response look like? Penn ESE370 Fall DeHon 6

What does look like? Penn ESE370 Fall DeHon 7

Shape of Curve x e -x 1-e -x Penn ESE370 Fall DeHon 8

Shape of Curve x e -x 1-e -x /e = /e 2 = Penn ESE370 Fall DeHon 9

What is C? Penn ESE370 Fall DeHon 10

Capacitance Wire MOSFET gate Logical Gate Fanout -- Total gate load Penn ESE370 Fall DeHon 11

Wire Capacitance Penn ESE370 Fall DeHon 12

Wire Capacitance Penn ESE370 Fall DeHon 13

There are always Rs and Cs Modeling vs. discrete components Dominant effects –Rbig + Rsmall ≈ Rbig –Cbig || Csmall ≈ Cbig Penn ESE370 Fall DeHon 14

First Order Model Switch –Loads input capacitively As dig in, understand: –Origin of capacitance –How can we engineer –Tradeoffs Penn ESE370 Fall DeHon 15

Logic Gate Input Capacitance Capacitance on –A input? –B input? Penn ESE370 Fall DeHon 16

Fanout in Circuit Output routed to many gate inputs Penn ESE370 Fall DeHon 17

Fanout in Circuit Maximum fanout? Second? Min? Penn ESE370 Fall DeHon 18

Lumped Capacitive Load Penn ESE370 Fall DeHon 19

What is R? Penn ESE370 Fall DeHon 20

Resistance Wire resistance –Supply to transistor source –Transistor output gate it is driving Transistor equivalent resistance Penn ESE370 Fall DeHon 21

Wire Resistances Penn ESE370 Fall DeHon 22

First Order Model Switch –Resistive driver As dig in, understand: –More sophisticated view –How can we engineer –Tradeoffs Penn ESE370 Fall DeHon 23

Equivalent Resistance What resistances might transistors contribute? –How many cases? Penn ESE370 Fall DeHon 24

Lumped Resistive Source Penn ESE370 Fall DeHon 25 R trnet = parallel and series combination of R tr

Measuring Delay Penn ESE370 Fall DeHon 26

Measuring Gate Delay Next stage starts to switch before first finishes Measure 50%--50% Penn ESE370 Fall DeHon 27 67ps 80ps

Characterizing Gate/Technology Delay measure will be –Function of load on gate –Function of input rise time Which, in turn, may be a function of input loading Penn ESE370 Fall DeHon 28

Delay vs. Risetime Penn ESE370 Fall DeHon 29 10ps delay 20ps delay 1ps rise100ps rise

Characterizing Gate/Technology Delay measure will be –Function of load on gate –Function of input rise time Which, in turn, may be a function of input loading Want to understand typical –At least comparable Penn ESE370 Fall DeHon 30

Measuring/Characterizing Drive with a gate –Not an ideal source Measure loaded gate –Typical loading – FO4 Penn ESE370 Fall DeHon 31

HW2 Recommendation Penn ESE370 Fall DeHon 32

Rise/Fall Rise and Fall time may differ –Why? Penn ESE370 Fall DeHon 33

Delay Model of Gate Penn ESE370 Fall DeHon 34

Sample Gate Penn ESE370 Fall DeHon 35

Sample Gate Internal stages have delay External depend on load Assume (guarantee) all inputs same load Penn ESE370 Fall DeHon 36

Sample Gate What is A? B? Penn ESE370 Fall DeHon 37

Admin HW1 grades posted HW2 due Friday Here on Friday for lecture Penn ESE370 Fall DeHon 38

Delay is RC Charging Penn ESE370 Fall DeHon 39